1 /*
2 * Copyright (c) 2006-2022, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2017-08-24 chinesebear first version
9 */
10
11
12
13 #ifndef SYNOP_GMAC_PLAT_H
14 #define SYNOP_GMAC_PLAT_H 1
15
16 /* sw
17 #include <linux/kernel.h>
18 #include <asm/io.h>
19 #include <linux/gfp.h>
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 */
23 #include "synopGMAC_types.h"
24 #include "synopGMAC_debug.h"
25 //#include "mii.h"
26 //#include "GMAC_Pmon.h"
27 //#include "synopGMAC_Host.h"
28 #include <rtthread.h>
29 //sw: copy the type define into here
30 #define IOCTL_READ_REGISTER SIOCDEVPRIVATE+1
31 #define IOCTL_WRITE_REGISTER SIOCDEVPRIVATE+2
32 #define IOCTL_READ_IPSTRUCT SIOCDEVPRIVATE+3
33 #define IOCTL_READ_RXDESC SIOCDEVPRIVATE+4
34 #define IOCTL_READ_TXDESC SIOCDEVPRIVATE+5
35 #define IOCTL_POWER_DOWN SIOCDEVPRIVATE+6
36
37 #define SYNOP_GMAC0 1
38
39 typedef int bool;
40 //typedef unsigned long dma_addr_t;
41
42
43
44 #define KUSEG_ADDR 0x0
45 #define CACHED_MEMORY_ADDR 0x80000000
46 #define UNCACHED_MEMORY_ADDR 0xa0000000
47 #define KSEG2_ADDR 0xc0000000
48 #define MAX_MEM_ADDR 0xbe000000
49 #define RESERVED_ADDR 0xbfc80000
50
51 #define CACHED_TO_PHYS(x) ((unsigned)(x) & 0x7fffffff)
52 #define PHYS_TO_CACHED(x) ((unsigned)(x) | CACHED_MEMORY_ADDR)
53 #define UNCACHED_TO_PHYS(x) ((unsigned)(x) & 0x1fffffff)
54 #define PHYS_TO_UNCACHED(x) ((unsigned)(x) | UNCACHED_MEMORY_ADDR)
55 #define VA_TO_CINDEX(x) ((unsigned)(x) & 0xffffff | CACHED_MEMORY_ADDR)
56 #define CACHED_TO_UNCACHED(x) (PHYS_TO_UNCACHED(CACHED_TO_PHYS(x)))
57
58 #define VA_TO_PA(x) UNCACHED_TO_PHYS(x)
59
60
61 /* sw
62 #define TR0(fmt, args...) printk(KERN_CRIT "SynopGMAC: " fmt, ##args)
63
64 #ifdef DEBUG
65 #undef TR
66 # define TR(fmt, args...) printk(KERN_CRIT "SynopGMAC: " fmt, ##args)
67 #else
68 # define TR(fmt, args...) // not debugging: nothing
69 #endif
70 */
71 /*
72 #define TR0(fmt, args...) printf("SynopGMAC: " fmt, ##args)
73 */
74
75 /*
76 #ifdef DEBUG
77 #undef TR
78 # define TR(fmt, args...) printf("SynopGMAC: " fmt, ##args)
79 #else
80 //# define TR(fmt, args...) // not debugging: nothing
81 #define TR(fmt, args...) printf("SynopGMAC: " fmt, ##args)
82 #endif
83 */
84
85 //sw: nothing to display
86 #define TR0(fmt, args...) //rt_kprintf(fmt, ##args)
87 #define TR(fmt, args...) //rt_kprintf(fmt, ##args)
88 //#define TR rt_kprintf
89
90 //typedef int bool;
91 enum synopGMAC_boolean
92 {
93 false = 0,
94 true = 1
95 };
96
97
98 #define DEFAULT_DELAY_VARIABLE 10
99 #define DEFAULT_LOOP_VARIABLE 10000
100
101 /* There are platform related endian conversions
102 *
103 */
104
105 #define LE32_TO_CPU __le32_to_cpu
106 #define BE32_TO_CPU __be32_to_cpu
107 #define CPU_TO_LE32 __cpu_to_le32
108
109 /* Error Codes */
110 #define ESYNOPGMACNOERR 0
111 #define ESYNOPGMACNOMEM 1
112 #define ESYNOPGMACPHYERR 2
113 #define ESYNOPGMACBUSY 3
114
115 struct Network_interface_data
116 {
117 u32 unit;
118 u32 addr;
119 u32 data;
120 };
121
122
123 /**
124 * These are the wrapper function prototypes for OS/platform related routines
125 */
126
127 void * plat_alloc_memory(u32 );
128 void plat_free_memory(void *);
129
130 //void * plat_alloc_consistent_dmaable_memory(struct pci_dev *, u32, u32 *);
131 //void plat_free_consistent_dmaable_memory (struct pci_dev *, u32, void *, u32);
132
133 void plat_delay(u32);
134
135
136 /**
137 * The Low level function to read register contents from Hardware.
138 *
139 * @param[in] pointer to the base of register map
140 * @param[in] Offset from the base
141 * \return Returns the register contents
142 */
synopGMACReadReg(u32 RegBase,u32 RegOffset)143 static u32 synopGMACReadReg(u32 RegBase, u32 RegOffset)
144 {
145 u32 addr;
146 u32 data;
147
148 addr = RegBase + (u32)RegOffset;
149 data = *(volatile u32 *)addr;
150
151 #if SYNOP_REG_DEBUG
152 TR("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, (u32)RegBase, RegOffset, data );
153 #endif
154 // rt_kprintf("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, (u32)RegBase, RegOffset, data );
155 return data;
156
157 }
158
159 /**
160 * The Low level function to write to a register in Hardware.
161 *
162 * @param[in] pointer to the base of register map
163 * @param[in] Offset from the base
164 * @param[in] Data to be written
165 * \return void
166 */
synopGMACWriteReg(u32 RegBase,u32 RegOffset,u32 RegData)167 static void synopGMACWriteReg(u32 RegBase, u32 RegOffset, u32 RegData )
168 {
169
170 u32 addr;
171
172 addr = RegBase + (u32)RegOffset;
173 // rt_kprintf("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__,(u32) RegBase, RegOffset, RegData );
174 #if SYNOP_REG_DEBUG
175 TR("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__,(u32) RegBase, RegOffset, RegData );
176 #endif
177 *(volatile u32 *)addr = RegData;
178
179 if(addr == 0xbfe1100c)
180 DEBUG_MES("regdata = %08x\n", RegData);
181 return;
182 }
183
184 /**
185 * The Low level function to set bits of a register in Hardware.
186 *
187 * @param[in] pointer to the base of register map
188 * @param[in] Offset from the base
189 * @param[in] Bit mask to set bits to logical 1
190 * \return void
191 */
synopGMACSetBits(u32 RegBase,u32 RegOffset,u32 BitPos)192 static void synopGMACSetBits(u32 RegBase, u32 RegOffset, u32 BitPos)
193 {
194 //u64 addr = (u64)RegBase + (u64)RegOffset;
195 u32 data;
196 data = synopGMACReadReg(RegBase, RegOffset);
197 data |= BitPos;
198 synopGMACWriteReg(RegBase, RegOffset, data);
199 // writel(data,(void *)addr);
200 #if SYNOP_REG_DEBUG
201 TR("%s !!!!!!!!!!!!! RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, RegOffset, data );
202 #endif
203 return;
204 }
205
206
207 /**
208 * The Low level function to clear bits of a register in Hardware.
209 *
210 * @param[in] pointer to the base of register map
211 * @param[in] Offset from the base
212 * @param[in] Bit mask to clear bits to logical 0
213 * \return void
214 */
synopGMACClearBits(u32 RegBase,u32 RegOffset,u32 BitPos)215 static void synopGMACClearBits(u32 RegBase, u32 RegOffset, u32 BitPos)
216 {
217 u32 data;
218 data = synopGMACReadReg(RegBase, RegOffset);
219 data &= (~BitPos);
220 synopGMACWriteReg(RegBase, RegOffset, data);
221 #if SYNOP_REG_DEBUG
222 TR("%s !!!!!!!!!!!!! RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, RegOffset, data );
223 #endif
224 return;
225 }
226
227 /**
228 * The Low level function to Check the setting of the bits.
229 *
230 * @param[in] pointer to the base of register map
231 * @param[in] Offset from the base
232 * @param[in] Bit mask to set bits to logical 1
233 * \return returns TRUE if set to '1' returns FALSE if set to '0'. Result undefined there are no bit set in the BitPos argument.
234 *
235 */
synopGMACCheckBits(u32 RegBase,u32 RegOffset,u32 BitPos)236 static bool synopGMACCheckBits(u32 RegBase, u32 RegOffset, u32 BitPos)
237 {
238
239 u32 data;
240 data = synopGMACReadReg(RegBase, RegOffset);
241 data &= BitPos;
242 if(data) return true;
243 else return false;
244
245 }
246
247
248
249
250
251 #endif
252