1 /* SPDX-License-Identifier: Apache-2.0 */
2 /* Copyright (c) 2006-2018, RT-Thread Development Team
3  * Copyright (c) 2020, duhuanpeng<548708880@qq.com>
4  *
5  * Change Logs:
6  * Date           Author       Notes
7  * 2015-01-20     Bernard      the first version
8  * 2017-10-20      ZYH         add mode open drain and input pull down
9  * 2020-06-01     Du Huanpeng  GPIO driver based on <components/drivers/include/drivers/dev_pin.h>
10  */
11 #include <rtthread.h>
12 #include <drivers/dev_pin.h>
13 #include <ls2k1000.h>
14 #include "drv_gpio.h"
15 
16 #ifdef RT_USING_PIN
17 #define     GPIO_IRQ_NUM                    (64)
18 static struct gpio_irq_def _g_gpio_irq_tbl[GPIO_IRQ_NUM];
19 
loongson_pin_mode(struct rt_device * device,rt_base_t pin,rt_uint8_t mode)20 static void loongson_pin_mode(struct rt_device *device, rt_base_t pin, rt_uint8_t mode)
21 {
22     struct loongson_gpio *gpio;
23     rt_uint64_t m;
24 
25     gpio = (void *)device->user_data;
26     m = (rt_uint64_t)1 << pin;
27 
28     switch (mode)
29     {
30     case PIN_MODE_OUTPUT:
31         gpio->GPIO0_OEN &= ~m;
32         break;
33     case PIN_MODE_INPUT:
34         gpio->GPIO0_OEN |= m;
35         break;
36     case PIN_MODE_INPUT_PULLUP:
37         gpio->GPIO0_OEN |= m;
38         break;
39     case PIN_MODE_INPUT_PULLDOWN:
40         gpio->GPIO0_OEN |= m;
41         break;
42     case PIN_MODE_OUTPUT_OD:
43         gpio->GPIO0_OEN &= ~m;
44         break;
45     default:
46         /* error */
47         rt_kprintf("error\n");
48     }
49 }
50 
loongson_pin_write(struct rt_device * device,rt_base_t pin,rt_uint8_t value)51 static void loongson_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t value)
52 {
53     struct loongson_gpio *gpio;
54     rt_uint64_t m;
55 
56     if (pin < 0 || pin >= 60)
57     {
58         rt_kprintf("error\n");
59         return;
60     }
61 
62     gpio = (void *)device->user_data;
63     m = (rt_uint64_t)1 << pin;
64 
65     if (value)
66         gpio->GPIO0_O |= m;
67     else
68         gpio->GPIO0_O &= ~m;
69 }
loongson_pin_read(struct rt_device * device,rt_base_t pin)70 static rt_ssize_t loongson_pin_read(struct rt_device *device, rt_base_t pin)
71 {
72     struct loongson_gpio *gpio;
73     rt_ssize_t rc;
74 
75     gpio = (void *)device->user_data;
76     rt_uint64_t m;
77 
78     m  = gpio->GPIO0_I;
79     m &= (rt_uint64_t)1 << pin;
80 
81     rc = !!m;
82 
83     return rc;
84 }
85 
86 /* TODO: add GPIO interrupt */
loongson_pin_attach_irq(struct rt_device * device,rt_base_t pin,rt_uint8_t mode,void (* hdr)(void * args),void * args)87 static rt_err_t loongson_pin_attach_irq(struct rt_device *device, rt_base_t pin, rt_uint8_t mode, void (*hdr)(void *args), void *args)
88 {
89     rt_uint8_t index;
90     rt_uint64_t m;
91     struct loongson_gpio *gpio;
92 
93     gpio = (void *)device->user_data;
94 
95     if (pin < 4)
96     {
97         index = pin;
98     }
99     else if (pin < 32)
100     {
101         index = 5;
102     }
103     else
104     {
105         index = 6;
106     }
107 
108     _g_gpio_irq_tbl[index].irq_cb[pin]    = hdr;
109     _g_gpio_irq_tbl[index].irq_arg[pin]   = args;
110     _g_gpio_irq_tbl[index].irq_type[pin]  = mode;
111 
112     liointc_set_irq_mode(index, mode);
113     m = (rt_uint64_t)1 << pin;
114     gpio->GPIO0_INTEN |= m;
115 
116     return RT_EOK;
117 }
loongson_pin_detach_irq(struct rt_device * device,rt_base_t pin)118 static rt_err_t loongson_pin_detach_irq(struct rt_device *device, rt_base_t pin)
119 {
120     struct loongson_gpio *gpio;
121 
122     gpio = (void *)device->user_data;
123 
124     rt_uint8_t index;
125     if (pin < 4)
126     {
127         index = pin;
128     }
129     else if (pin < 32)
130     {
131         index = 5;
132     }
133     else
134     {
135         index = 6;
136     }
137     _g_gpio_irq_tbl[index].irq_cb[pin]    = RT_NULL;
138     _g_gpio_irq_tbl[index].irq_arg[pin]   = RT_NULL;
139     _g_gpio_irq_tbl[index].irq_type[pin]  = RT_NULL;
140     _g_gpio_irq_tbl[index].state[pin]     = RT_NULL;
141 
142     return RT_EOK;
143 }
loongson_pin_irq_enable(struct rt_device * device,rt_base_t pin,rt_uint8_t enabled)144 static rt_err_t loongson_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled)
145 {
146     struct loongson_gpio *gpio;
147 
148     gpio = (void *)device->user_data;
149 
150     rt_uint8_t index;
151     if (pin < 4)
152     {
153         index = pin;
154     }
155     else if (pin < 32)
156     {
157         index = 5;
158     }
159     else
160     {
161         index = 6;
162     }
163 
164     if (enabled)
165         _g_gpio_irq_tbl[index].state[pin] = 1;
166     else
167         _g_gpio_irq_tbl[index].state[pin] = 0;
168     return RT_EOK;
169 }
170 
gpio_irq_handler(int irq,void * param)171 static void gpio_irq_handler(int irq, void *param)
172 {
173     struct gpio_irq_def *irq_def = (struct gpio_irq_def *)param;
174     rt_uint32_t pin;
175     rt_uint32_t value;
176     rt_uint32_t tmpvalue;
177 
178     if (irq == LS2K_GPIO0_INT_IRQ)
179     {
180         pin = 0;
181     }
182     else if (irq == LS2K_GPIO1_INT_IRQ)
183     {
184         pin = 1;
185     }
186     else if (irq == LS2K_GPIO2_INT_IRQ)
187     {
188         pin = 2;
189     }
190     else if (irq == LS2K_GPIO3_INT_IRQ)
191     {
192         pin = 3;
193     }
194     else if (irq == LS2K_GPIO_INTLO_IRQ)
195     {
196         pin = 4;
197     }
198     else
199     {
200         pin = 32;
201     }
202 
203     while (value)
204     {
205         if ((value & 0x1) && (irq_def->irq_cb[pin] != RT_NULL))
206         {
207             if (irq_def->state[pin])
208             {
209                 irq_def->irq_cb[pin](irq_def->irq_arg[pin]);
210             }
211         }
212         pin++;
213         value = value >> 1;
214     }
215 }
216 
217 static struct rt_pin_ops loongson_pin_ops =
218 {
219     .pin_mode  = loongson_pin_mode,
220     .pin_write = loongson_pin_write,
221     .pin_read  = loongson_pin_read,
222 
223     /* TODO: add GPIO interrupt */
224     .pin_attach_irq = loongson_pin_attach_irq,
225     .pin_detach_irq = loongson_pin_detach_irq,
226     .pin_irq_enable = loongson_pin_irq_enable,
227     .pin_get        = RT_NULL,
228 };
229 
230 
loongson_pin_init(void)231 int loongson_pin_init(void)
232 {
233     int rc;
234     static struct loongson_gpio *loongson_gpio_priv;
235 
236     loongson_gpio_priv = (void *)GPIO_BASE;
237     rc = rt_device_pin_register("pin", &loongson_pin_ops, loongson_gpio_priv);
238 
239     //gpio0
240     rt_hw_interrupt_install(LS2K_GPIO0_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[0], "gpio0_irq");
241     rt_hw_interrupt_umask(LS2K_GPIO0_INT_IRQ);
242 
243     //gpio1
244     rt_hw_interrupt_install(LS2K_GPIO1_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[1], "gpio1_irq");
245     rt_hw_interrupt_umask(LS2K_GPIO1_INT_IRQ);
246 
247     //gpio2
248     rt_hw_interrupt_install(LS2K_GPIO2_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[2], "gpio2_irq");
249     rt_hw_interrupt_umask(LS2K_GPIO2_INT_IRQ);
250 
251     //gpio3
252     rt_hw_interrupt_install(LS2K_GPIO3_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[3], "gpio3_irq");
253     rt_hw_interrupt_umask(LS2K_GPIO3_INT_IRQ);
254 
255     //gpio4~gpio31
256     rt_hw_interrupt_install(LS2K_GPIO_INTLO_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[4], "gpio4_irq");
257     rt_hw_interrupt_umask(LS2K_GPIO_INTLO_IRQ);
258 
259     //gpio32~gpio63
260     rt_hw_interrupt_install(LS2K_GPIO_INTHI_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[5], "gpio5_irq");
261     rt_hw_interrupt_umask(LS2K_GPIO_INTHI_IRQ);
262 
263     return rc;
264 }
265 INIT_BOARD_EXPORT(loongson_pin_init);
266 
267 #endif /*RT_USING_PIN */
268