1 /* 2 * Copyright (c) 2006-2022, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2017-08-24 chinesebear first version 9 */ 10 #ifndef __MII_H__ 11 #define __MII_H__ 12 /* Generic MII registers. */ 13 14 #include "synopGMAC_types.h" 15 16 #define MII_BMCR 0x00 /* Basic mode control register */ 17 #define MII_BMSR 0x01 /* Basic mode status register */ 18 #define MII_PHYSID1 0x02 /* PHYS ID 1 */ 19 #define MII_PHYSID2 0x03 /* PHYS ID 2 */ 20 #define MII_ADVERTISE 0x04 /* Advertisement control reg */ 21 #define MII_LPA 0x05 /* Link partner ability reg */ 22 #define MII_EXPANSION 0x06 /* Expansion register */ 23 #define MII_CTRL1000 0x09 /* 1000BASE-T control */ 24 #define MII_STAT1000 0x0a /* 1000BASE-T status */ 25 #define MII_ESTATUS 0x0f /* Extended Status */ 26 #define MII_DCOUNTER 0x12 /* Disconnect counter */ 27 #define MII_FCSCOUNTER 0x13 /* False carrier counter */ 28 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ 29 #define MII_RERRCOUNTER 0x15 /* Receive error counter */ 30 #define MII_SREVISION 0x16 /* Silicon revision */ 31 #define MII_RESV1 0x17 /* Reserved... */ 32 #define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ 33 #define MII_PHYADDR 0x19 /* PHY address */ 34 #define MII_RESV2 0x1a /* Reserved... */ 35 #define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ 36 #define MII_NCONFIG 0x1c /* Network interface config */ 37 38 /* Basic mode control register. */ 39 #define BMCR_RESV 0x003f /* Unused... */ 40 #define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ 41 #define BMCR_CTST 0x0080 /* Collision test */ 42 #define BMCR_FULLDPLX 0x0100 /* Full duplex */ 43 #define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ 44 #define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ 45 #define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ 46 #define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ 47 #define BMCR_SPEED100 0x2000 /* Select 100Mbps */ 48 #define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ 49 #define BMCR_RESET 0x8000 /* Reset the DP83840 */ 50 51 /* Basic mode status register. */ 52 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */ 53 #define BMSR_JCD 0x0002 /* Jabber detected */ 54 #define BMSR_LSTATUS 0x0004 /* Link status */ 55 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ 56 #define BMSR_RFAULT 0x0010 /* Remote fault detected */ 57 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ 58 #define BMSR_RESV 0x00c0 /* Unused... */ 59 #define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ 60 #define BMSR_100FULL2 0x0200 /* Can do 100BASE-T2 HDX */ 61 #define BMSR_100HALF2 0x0400 /* Can do 100BASE-T2 FDX */ 62 #define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ 63 #define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ 64 #define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ 65 #define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ 66 #define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ 67 68 /* Advertisement control register. */ 69 #define ADVERTISE_SLCT 0x001f /* Selector bits */ 70 #define ADVERTISE_CSMA 0x0001 /* Only selector supported */ 71 #define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ 72 #define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ 73 #define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ 74 #define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ 75 #define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ 76 #define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ 77 #define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ 78 #define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ 79 #define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ 80 #define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ 81 #define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */ 82 #define ADVERTISE_RESV 0x1000 /* Unused... */ 83 #define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ 84 #define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ 85 #define ADVERTISE_NPAGE 0x8000 /* Next page bit */ 86 87 #define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ 88 ADVERTISE_CSMA) 89 #define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ 90 ADVERTISE_100HALF | ADVERTISE_100FULL) 91 92 /* Indicates what features are advertised by the interface. */ 93 #define ADVERTISED_10baseT_Half (1 << 0) 94 #define ADVERTISED_10baseT_Full (1 << 1) 95 #define ADVERTISED_100baseT_Half (1 << 2) 96 #define ADVERTISED_100baseT_Full (1 << 3) 97 #define ADVERTISED_1000baseT_Half (1 << 4) 98 #define ADVERTISED_1000baseT_Full (1 << 5) 99 #define ADVERTISED_Autoneg (1 << 6) 100 #define ADVERTISED_TP (1 << 7) 101 #define ADVERTISED_AUI (1 << 8) 102 #define ADVERTISED_MII (1 << 9) 103 #define ADVERTISED_FIBRE (1 << 10) 104 #define ADVERTISED_BNC (1 << 11) 105 #define ADVERTISED_10000baseT_Full (1 << 12) 106 #define ADVERTISED_Pause (1 << 13) 107 #define ADVERTISED_Asym_Pause (1 << 14) 108 109 /* Link partner ability register. */ 110 #define LPA_SLCT 0x001f /* Same as advertise selector */ 111 #define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ 112 #define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */ 113 #define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */ 114 #define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */ 115 #define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ 116 #define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */ 117 #define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ 118 #define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/ 119 #define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ 120 #define LPA_PAUSE_CAP 0x0400 /* Can pause */ 121 #define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ 122 #define LPA_RESV 0x1000 /* Unused... */ 123 #define LPA_RFAULT 0x2000 /* Link partner faulted */ 124 #define LPA_LPACK 0x4000 /* Link partner acked us */ 125 #define LPA_NPAGE 0x8000 /* Next page bit */ 126 127 #define LPA_DUPLEX (LPA_10FULL | LPA_100FULL) 128 #define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) 129 130 /* Expansion register for auto-negotiation. */ 131 #define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */ 132 #define EXPANSION_LCWP 0x0002 /* Got new RX page code word */ 133 #define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ 134 #define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ 135 #define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ 136 #define EXPANSION_RESV 0xffe0 /* Unused... */ 137 138 #define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ 139 #define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ 140 141 /* N-way test register. */ 142 #define NWAYTEST_RESV1 0x00ff /* Unused... */ 143 #define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ 144 #define NWAYTEST_RESV2 0xfe00 /* Unused... */ 145 146 /* 1000BASE-T Control register */ 147 #define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ 148 #define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ 149 150 /* 1000BASE-T Status register */ 151 #define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */ 152 #define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */ 153 #define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */ 154 155 #define SUPPORTED_10baseT_Half (1 << 0) 156 #define SUPPORTED_10baseT_Full (1 << 1) 157 #define SUPPORTED_100baseT_Half (1 << 2) 158 #define SUPPORTED_100baseT_Full (1 << 3) 159 #define SUPPORTED_1000baseT_Half (1 << 4) 160 #define SUPPORTED_1000baseT_Full (1 << 5) 161 #define SUPPORTED_Autoneg (1 << 6) 162 #define SUPPORTED_TP (1 << 7) 163 #define SUPPORTED_AUI (1 << 8) 164 #define SUPPORTED_MII (1 << 9) 165 #define SUPPORTED_FIBRE (1 << 10) 166 #define SUPPORTED_BNC (1 << 11) 167 #define SUPPORTED_10000baseT_Full (1 << 12) 168 #define SUPPORTED_Pause (1 << 13) 169 #define SUPPORTED_Asym_Pause (1 << 14) 170 171 172 /* Which connector port. */ 173 #define PORT_TP 0x00 174 #define PORT_AUI 0x01 175 #define PORT_MII 0x02 176 #define PORT_FIBRE 0x03 177 #define PORT_BNC 0x04 178 179 /* Which transceiver to use. */ 180 #define XCVR_INTERNAL 0x00 181 #define XCVR_EXTERNAL 0x01 182 #define XCVR_DUMMY1 0x02 183 #define XCVR_DUMMY2 0x03 184 #define XCVR_DUMMY3 0x04 185 186 #define AUTONEG_DISABLE 0x00 187 #define AUTONEG_ENABLE 0x01 188 189 190 #define SPEED_10 10 191 #define SPEED_100 100 192 #define SPEED_1000 1000 193 #define SPEED_2500 2500 194 #define SPEED_10000 10000 195 196 #define DUPLEX_HALF 0x00 197 #define DUPLEX_FULL 0x01 198 199 struct ethtool_cmd { 200 u32 cmd; 201 u32 supported; /* Features this interface supports */ 202 u32 advertising; /* Features this interface advertises */ 203 u16 speed; /* The forced speed, 10Mb, 100Mb, gigabit */ 204 u8 duplex; /* Duplex, half or full */ 205 u8 port; /* Which connector port */ 206 u8 phy_address; 207 u8 transceiver; /* Which transceiver to use */ 208 u8 autoneg; /* Enable or disable autonegotiation */ 209 u32 maxtxpkt; /* Tx pkts before generating tx int */ 210 u32 maxrxpkt; /* Rx pkts before generating rx int */ 211 u32 reserved[4]; 212 }; 213 214 struct mii_if_info { 215 int phy_id; 216 int advertising; 217 int phy_id_mask; 218 int reg_num_mask; 219 220 unsigned int full_duplex : 1; /* is full duplex? */ 221 unsigned int force_media : 1; /* is autoneg. disabled? */ 222 unsigned int supports_gmii : 1; /* are GMII registers supported? */ 223 224 struct synopGMACNetworkAdapter *dev; 225 int (*mdio_read) (struct synopGMACNetworkAdapter *dev, int phy_id, int location); 226 void (*mdio_write) (struct synopGMACNetworkAdapter *dev, int phy_id, int location, int val); 227 }; 228 229 #endif 230