1 /*
2 * Copyright (c) 2006-2022, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2017-08-24 chinesebear first version
9 * 2020-08-10 lizhirui porting to ls2k
10 */
11
12 #ifndef SYNOP_GMAC_PLAT_H
13 #define SYNOP_GMAC_PLAT_H 1
14
15 /* sw
16 #include <linux/kernel.h>
17 #include <asm/io.h>
18 #include <linux/gfp.h>
19 #include <linux/slab.h>
20 #include <linux/pci.h>
21 */
22 #include "synopGMAC_types.h"
23 #include "synopGMAC_debug.h"
24 //#include "mii.h"
25 //#include "GMAC_Pmon.h"
26 //#include "synopGMAC_Host.h"
27 #include <rtthread.h>
28 #include <stdint.h>
29 #include "mips_addrspace.h"
30 //sw: copy the type define into here
31 #define IOCTL_READ_REGISTER SIOCDEVPRIVATE+1
32 #define IOCTL_WRITE_REGISTER SIOCDEVPRIVATE+2
33 #define IOCTL_READ_IPSTRUCT SIOCDEVPRIVATE+3
34 #define IOCTL_READ_RXDESC SIOCDEVPRIVATE+4
35 #define IOCTL_READ_TXDESC SIOCDEVPRIVATE+5
36 #define IOCTL_POWER_DOWN SIOCDEVPRIVATE+6
37
38 #define SYNOP_GMAC0 1
39
40 typedef int bool;
41 //typedef unsigned long dma_addr_t;
42
43 #define KUSEG_ADDR 0x0
44 #define CACHED_MEMORY_ADDR KSEG0BASE
45 #define UNCACHED_MEMORY_ADDR KSEG0BASE
46 #define KSEG2_ADDR KSEG2BASE
47 #define MAX_MEM_ADDR KSEG3BASE
48 #define RESERVED_ADDR KSEG3BASE
49
50 #define CACHED_TO_PHYS(x) ((uint64_t)(x) - CACHED_MEMORY_ADDR)
51 #define PHYS_TO_CACHED(x) ((uint64_t)(x) + CACHED_MEMORY_ADDR)
52 #define UNCACHED_TO_PHYS(x) ((uint64_t)(x) - UNCACHED_MEMORY_ADDR)
53 #define PHYS_TO_UNCACHED(x) ((uint64_t)(x) + UNCACHED_MEMORY_ADDR)
54 #define VA_TO_CINDEX(x) (PHYS_TO_CACHED(UNCACHED_TO_PHYS(x)))
55 #define CACHED_TO_UNCACHED(x) (PHYS_TO_UNCACHED(CACHED_TO_PHYS(x)))
56
57 #define VA_TO_PA(x) CACHED_TO_PHYS(x)
58
59 /* sw
60 #define TR0(fmt, args...) printk(KERN_CRIT "SynopGMAC: " fmt, ##args)
61
62 #ifdef DEBUG
63 #undef TR
64 # define TR(fmt, args...) printk(KERN_CRIT "SynopGMAC: " fmt, ##args)
65 #else
66 # define TR(fmt, args...) // not debugging: nothing
67 #endif
68 */
69 /*
70 #define TR0(fmt, args...) printf("SynopGMAC: " fmt, ##args)
71 */
72
73 /*
74 #ifdef DEBUG
75 #undef TR
76 # define TR(fmt, args...) printf("SynopGMAC: " fmt, ##args)
77 #else
78 //# define TR(fmt, args...) // not debugging: nothing
79 #define TR(fmt, args...) printf("SynopGMAC: " fmt, ##args)
80 #endif
81 */
82
83 //sw: nothing to display
84 #define TR0(fmt, args...) //rt_kprintf(fmt, ##args)
85 #define TR(fmt, args...) //rt_kprintf(fmt, ##args)
86
87 //typedef int bool;
88 enum synopGMAC_boolean
89 {
90 false = 0,
91 true = 1
92 };
93
94 #define DEFAULT_DELAY_VARIABLE 10
95 #define DEFAULT_LOOP_VARIABLE 10000
96
97 /* There are platform related endian conversions
98 *
99 */
100 #define LE32_TO_CPU __le32_to_cpu
101 #define BE32_TO_CPU __be32_to_cpu
102 #define CPU_TO_LE32 __cpu_to_le32
103
104 /* Error Codes */
105 #define ESYNOPGMACNOERR 0
106 #define ESYNOPGMACNOMEM 1
107 #define ESYNOPGMACPHYERR 2
108 #define ESYNOPGMACBUSY 3
109
110 struct Network_interface_data
111 {
112 u32 unit;
113 u64 addr;
114 u32 data;
115 };
116
117
118 /**
119 * These are the wrapper function prototypes for OS/platform related routines
120 */
121 void * plat_alloc_memory(u32 );
122 void plat_free_memory(void *);
123
124 //void * plat_alloc_consistent_dmaable_memory(struct pci_dev *, u32, u32 *);
125 //void plat_free_consistent_dmaable_memory (struct pci_dev *, u32, void *, u32);
126 void plat_delay(u32);
127
128
129 /**
130 * The Low level function to read register contents from Hardware.
131 *
132 * @param[in] pointer to the base of register map
133 * @param[in] Offset from the base
134 * \return Returns the register contents
135 */
synopGMACReadReg(u64 RegBase,u32 RegOffset)136 static u32 synopGMACReadReg(u64 RegBase, u32 RegOffset)
137 {
138 u64 addr;
139 u32 data;
140
141 addr = RegBase + (u32)RegOffset;
142 data = *(volatile u32 *)addr;
143
144 #if SYNOP_REG_DEBUG
145 TR("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, (u32)RegBase, RegOffset, data );
146 #endif
147 // rt_kprintf("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, (u32)RegBase, RegOffset, data );
148 return data;
149
150 }
151
152 /**
153 * The Low level function to write to a register in Hardware.
154 *
155 * @param[in] pointer to the base of register map
156 * @param[in] Offset from the base
157 * @param[in] Data to be written
158 * \return void
159 */
synopGMACWriteReg(u64 RegBase,u32 RegOffset,u32 RegData)160 static void synopGMACWriteReg(u64 RegBase, u32 RegOffset, u32 RegData )
161 {
162 u64 addr;
163 addr = RegBase + (u32)RegOffset;
164 // rt_kprintf("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__,(u32) RegBase, RegOffset, RegData );
165 #if SYNOP_REG_DEBUG
166 TR("%s RegBase = 0x%p RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__,(u32) RegBase, RegOffset, RegData );
167 #endif
168 *(volatile u32 *)addr = RegData;
169 /*if(addr == 0xbfe1100c)
170 DEBUG_MES("regdata = %08x\n", RegData);*/
171 return;
172 }
173
174 /**
175 * The Low level function to set bits of a register in Hardware.
176 *
177 * @param[in] pointer to the base of register map
178 * @param[in] Offset from the base
179 * @param[in] Bit mask to set bits to logical 1
180 * \return void
181 */
synopGMACSetBits(u64 RegBase,u32 RegOffset,u32 BitPos)182 static void synopGMACSetBits(u64 RegBase, u32 RegOffset, u32 BitPos)
183 {
184 //u64 addr = (u64)RegBase + (u64)RegOffset;
185 u32 data;
186 data = synopGMACReadReg(RegBase, RegOffset);
187 data |= BitPos;
188 synopGMACWriteReg(RegBase, RegOffset, data);
189 // writel(data,(void *)addr);
190 #if SYNOP_REG_DEBUG
191 TR("%s !!!!!!!!!!!!! RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, RegOffset, data );
192 #endif
193 return;
194 }
195
196
197 /**
198 * The Low level function to clear bits of a register in Hardware.
199 *
200 * @param[in] pointer to the base of register map
201 * @param[in] Offset from the base
202 * @param[in] Bit mask to clear bits to logical 0
203 * \return void
204 */
synopGMACClearBits(u64 RegBase,u32 RegOffset,u32 BitPos)205 static void synopGMACClearBits(u64 RegBase, u32 RegOffset, u32 BitPos)
206 {
207 u32 data;
208 data = synopGMACReadReg(RegBase, RegOffset);
209 data &= (~BitPos);
210 synopGMACWriteReg(RegBase, RegOffset, data);
211 #if SYNOP_REG_DEBUG
212 TR("%s !!!!!!!!!!!!! RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, RegOffset, data );
213 #endif
214 return;
215 }
216
217 /**
218 * The Low level function to Check the setting of the bits.
219 *
220 * @param[in] pointer to the base of register map
221 * @param[in] Offset from the base
222 * @param[in] Bit mask to set bits to logical 1
223 * \return returns TRUE if set to '1' returns FALSE if set to '0'. Result undefined there are no bit set in the BitPos argument.
224 *
225 */
synopGMACCheckBits(u64 RegBase,u32 RegOffset,u32 BitPos)226 static bool synopGMACCheckBits(u64 RegBase, u32 RegOffset, u32 BitPos)
227 {
228 u32 data;
229 data = synopGMACReadReg(RegBase, RegOffset);
230 data &= BitPos;
231
232 if(data)
233 {
234 return true;
235 }
236 else
237 {
238 return false;
239 }
240 }
241
242 #endif
243