1/*
2 * Copyright (c) 2006-2021, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date           Author       Notes
8 * 2010-04-20     fify         the first version
9 *
10 * For       : Renesas M16C
11 * Toolchain : IAR's EW for M16C v3.401
12 */
13
14    PUBLIC  rt_hw_timer_handler
15    PUBLIC  rt_hw_uart0_receive_handler
16
17    EXTERN  rt_thread_switch_interrupt_flag
18    EXTERN  rt_interrupt_from_thread
19    EXTERN  rt_interrupt_to_thread
20    EXTERN  rt_interrupt_enter
21    EXTERN  rt_interrupt_leave
22    EXTERN  rt_tick_increase
23    EXTERN  u0rec_handler
24
25    RSEG    CSTACK
26    RSEG    ISTACK
27    RSEG    CODE:CODE:NOROOT(2)
28
29rt_hw_context_switch_interrupt_do
30    MOV.B   #0, rt_thread_switch_interrupt_flag
31    MOV.W   rt_interrupt_from_thread, A0
32    STC     ISP, [A0]
33
34    MOV.W   rt_interrupt_to_thread, A0
35    LDC     [A0], ISP
36    POPM    R0,R1,R2,R3,A0,A1,SB,FB             ; Restore all processor registers from the new task's stack
37    REIT
38
39    .EVEN
40rt_hw_timer_handler:
41    PUSHM   R0,R1,R2,R3,A0,A1,SB,FB             ; Save current task's registers
42    JSR     rt_interrupt_enter
43    JSR     rt_tick_increase
44    JSR     rt_interrupt_leave
45
46    CMP.B   #1, rt_thread_switch_interrupt_flag
47    JEQ     rt_hw_context_switch_interrupt_do
48
49    POPM    R0,R1,R2,R3,A0,A1,SB,FB             ; Restore current task's registers
50    REIT                                        ; Return from interrup
51
52    .EVEN
53rt_hw_uart0_receive_handler:
54    PUSHM   R0,R1,R2,R3,A0,A1,SB,FB             ; Save current task's registers
55    JSR     rt_interrupt_enter
56    JSR     u0rec_handler
57    JSR     rt_interrupt_leave
58
59    CMP.B   #1, rt_thread_switch_interrupt_flag
60    JEQ     rt_hw_context_switch_interrupt_do
61
62    POPM    R0,R1,R2,R3,A0,A1,SB,FB             ; Restore current task's registers
63    REIT                                        ; Return from interrup
64
65    END
66