1/******************************************************************************* 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Except as contained in this notice, the name of Maxim Integrated 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated 24 * Products, Inc. Branding Policy. 25 * 26 * The mere transfer of this software does not imply any licenses 27 * of trade secrets, proprietary technology, copyrights, patents, 28 * trademarks, maskwork rights, or any other form of intellectual 29 * property whatsoever. Maxim Integrated Products, Inc. retains all 30 * ownership rights. 31 * 32 * $Date: 2018-12-18 15:37:22 -0600 (Tue, 18 Dec 2018) $ 33 * $Revision: 40072 $ 34 * 35 ******************************************************************************/ 36 37 .syntax unified 38 .arch armv7-m 39 40 .section .stack 41 .align 3 42#ifdef __STACK_SIZE 43 .equ Stack_Size, __STACK_SIZE 44#else 45 .equ Stack_Size, 0x00001000 46#endif 47 .globl __StackTop 48 .globl __StackLimit 49__StackLimit: 50 .space Stack_Size 51 .size __StackLimit, . - __StackLimit 52__StackTop: 53 .size __StackTop, . - __StackTop 54 55 .section .heap 56 .align 3 57#ifdef __HEAP_SIZE 58 .equ Heap_Size, __HEAP_SIZE 59#else 60 .equ Heap_Size, 0x00000C00 61#endif 62 .globl __HeapBase 63 .globl __HeapLimit 64__HeapBase: 65 .if Heap_Size 66 .space Heap_Size 67 .endif 68 .size __HeapBase, . - __HeapBase 69__HeapLimit: 70 .size __HeapLimit, . - __HeapLimit 71 72 73 .section .isr_vector 74 .align 2 75 .globl __isr_vector 76__isr_vector: 77 .long __StackTop /* Top of Stack */ 78 .long Reset_Handler /* Reset Handler */ 79 .long NMI_Handler /* NMI Handler */ 80 .long HardFault_Handler /* Hard Fault Handler */ 81 .long MemManage_Handler /* MPU Fault Handler */ 82 .long BusFault_Handler /* Bus Fault Handler */ 83 .long UsageFault_Handler /* Usage Fault Handler */ 84 .long 0 /* Reserved */ 85 .long 0 /* Reserved */ 86 .long 0 /* Reserved */ 87 .long 0 /* Reserved */ 88 .long SVC_Handler /* SVCall Handler */ 89 .long DebugMon_Handler /* Debug Monitor Handler */ 90 .long 0 /* Reserved */ 91 .long PendSV_Handler /* PendSV Handler */ 92 .long SysTick_Handler /* SysTick Handler */ 93 94 /* Device-specific Interrupts */ 95 .long PF_IRQHandler /* 0x10 0x0040 16: Power Fail */ 96 .long WDT0_IRQHandler /* 0x11 0x0044 17: Watchdog 0 */ 97 .long RSV00_IRQHandler /* 0x12 0x0048 18: RSV00 */ 98 .long RTC_IRQHandler /* 0x13 0x004C 19: RTC */ 99 .long RSV1_IRQHandler /* 0x14 0x0050 20: RSV1 */ 100 .long TMR0_IRQHandler /* 0x15 0x0054 21: Timer 0 */ 101 .long TMR1_IRQHandler /* 0x16 0x0058 22: Timer 1 */ 102 .long TMR2_IRQHandler /* 0x17 0x005C 23: Timer 2 */ 103 .long RSV02_IRQHandler /* 0x18 0x0060 24: RSV02 */ 104 .long RSV03_IRQHandler /* 0x19 0x0064 25: RSV03 */ 105 .long RSV04_IRQHandler /* 0x1A 0x0068 26: RSV04 */ 106 .long RSV05_IRQHandler /* 0x1B 0x006C 27: RSV05 */ 107 .long RSV06_IRQHandler /* 0x1C 0x0070 28: RSV06 */ 108 .long I2C0_IRQHandler /* 0x1D 0x0074 29: I2C0 */ 109 .long UART0_IRQHandler /* 0x1E 0x0078 30: UART 0 */ 110 .long UART1_IRQHandler /* 0x1F 0x007C 31: UART 1 */ 111 .long SPI0_IRQHandler /* 0x20 0x0080 32: SPIY17 */ 112 .long SPI1_IRQHandler /* 0x21 0x0084 33: SPIMSS */ 113 .long RSV07_IRQHandler /* 0x22 0x0088 34: RSV07 */ 114 .long RSV08_IRQHandler /* 0x23 0x008C 35: RSV08 */ 115 .long RSV09_IRQHandler /* 0x24 0x0090 36: RSV09 */ 116 .long RSV10_IRQHandler /* 0x25 0x0094 37: RSV10 */ 117 .long RSV11_IRQHandler /* 0x26 0x0098 38: RSV11 */ 118 .long FLC_IRQHandler /* 0x27 0x009C 39: FLC */ 119 .long GPIO0_IRQHandler /* 0x28 0x00A0 40: GPIO0 */ 120 .long RSV12_IRQHandler /* 0x29 0x00A4 41: RSV12 */ 121 .long RSV13_IRQHandler /* 0x2A 0x00A8 42: RSV13 */ 122 .long RSV14_IRQHandler /* 0x2B 0x00AC 43: RSV14 */ 123 .long DMA0_IRQHandler /* 0x2C 0x00B0 44: DMA0 */ 124 .long DMA1_IRQHandler /* 0x2D 0x00B4 45: DMA1 */ 125 .long DMA2_IRQHandler /* 0x2E 0x00B8 46: DMA2 */ 126 .long DMA3_IRQHandler /* 0x2F 0x00BC 47: DMA3 */ 127 .long RSV15_IRQHandler /* 0x30 0x00C0 48: RSV15 */ 128 .long RSV16_IRQHandler /* 0x31 0x00C4 49: RSV16 */ 129 .long RSV17_IRQHandler /* 0x32 0x00C8 50: RSV17 */ 130 .long RSV18_IRQHandler /* 0x33 0x00CC 51: RSV18 */ 131 .long I2C1_IRQHandler /* 0x34 0x00D0 52: I2C1 */ 132 .long RSV19_IRQHandler /* 0x35 0x00D4 53: RSV19 */ 133 .long RSV20_IRQHandler /* 0x36 0x00D8 54: RSV20 */ 134 .long RSV21_IRQHandler /* 0x37 0x00DC 55: RSV21 */ 135 .long RSV22_IRQHandler /* 0x38 0x00E0 56: RSV22 */ 136 .long RSV23_IRQHandler /* 0x39 0x00E4 57: RSV23 */ 137 .long RSV24_IRQHandler /* 0x3A 0x00E8 58: RSV24 */ 138 .long RSV25_IRQHandler /* 0x3B 0x00EC 59: RSV25 */ 139 .long RSV26_IRQHandler /* 0x3C 0x00F0 60: RSV26 */ 140 .long RSV27_IRQHandler /* 0x3D 0x00F4 61: RSV27 */ 141 .long RSV28_IRQHandler /* 0x3E 0x00F8 62: RSV28 */ 142 .long RSV29_IRQHandler /* 0x3F 0x00FC 63: RSV29 */ 143 .long RSV30_IRQHandler /* 0x40 0x0100 64: RSV30 */ 144 .long RSV31_IRQHandler /* 0x41 0x0104 65: RSV31 */ 145 .long RSV32_IRQHandler /* 0x42 0x0108 66: RSV32 */ 146 .long RSV33_IRQHandler /* 0x43 0x010C 67: RSV33 */ 147 .long RSV34_IRQHandler /* 0x44 0x0110 68: RSV34 */ 148 .long RSV35_IRQHandler /* 0x45 0x0114 69: RSV35 */ 149 .long GPIOWAKE_IRQHandler /* 0x46 0x0118 70: GPIO Wakeup */ 150 .text 151 .thumb 152 .thumb_func 153 .align 2 154 .globl Reset_Handler 155 .type Reset_Handler, %function 156Reset_Handler: 157 ldr r0, =__StackTop 158 mov sp, r0 159 160 /* PreInit runs before any RAM initialization. Example usage: DDR setup, etc. */ 161 ldr r0, =PreInit 162 blx r0 163 cbnz r0, .SKIPRAMINIT 164 165/* Loop to copy data from read only memory to RAM. The ranges 166 * of copy from/to are specified by following symbols evaluated in 167 * linker script. 168 * __load_data: Where data sections are saved. 169 * _data /_edata: RAM address range that data should be 170 * copied to. Both must be aligned to 4 bytes boundary. */ 171 172 ldr r1, =__load_data 173 ldr r2, =_data 174 ldr r3, =_edata 175 176#if 0 177/* Here are two copies of loop implemenations. First one favors code size 178 * and the second one favors performance. Default uses the first one. 179 * Change to "#if 0" to use the second one */ 180.LC0: 181 cmp r2, r3 182 ittt lt 183 ldrlt r0, [r1], #4 184 strlt r0, [r2], #4 185 blt .LC0 186#else 187 subs r3, r2 188 ble .LC1 189.LC0: 190 subs r3, #4 191 ldr r0, [r1, r3] 192 str r0, [r2, r3] 193 bgt .LC0 194.LC1: 195#endif 196 197/* 198 * Loop to zero out BSS section, which uses following symbols 199 * in linker script: 200 * _bss : start of BSS section. Must align to 4 201 * _ebss : end of BSS section. Must align to 4 202 */ 203 ldr r1, =_bss 204 ldr r2, =_ebss 205 206 movs r0, 0 207.LC2: 208 cmp r1, r2 209 itt lt 210 strlt r0, [r1], #4 211 blt .LC2 212 213.SKIPRAMINIT: 214 215 /* Perform system initialization after RAM initialization */ 216 ldr r0, =SystemInit 217 blx r0 218 219 /* This must be called to walk the constructor array for static C++ objects */ 220 /* Note: The linker file must have .data symbols for __X_array_start and __X_array_end */ 221 /* where X is {preinit, init, fini} */ 222 ldr r0, =__libc_init_array 223 blx r0 224 225 /* Transfer control to users main program */ 226 ldr r0, =entry 227 blx r0 228 229.SPIN: 230 /* spin if main ever returns. */ 231 bl .SPIN 232 233/* Macro to define default handlers. Default handler 234 * will be weak symbol and just dead loops. They can be 235 * overwritten by other handlers */ 236 .macro def_irq_handler handler_name 237 .align 1 238 .thumb_func 239 .weak \handler_name 240 .type \handler_name, %function 241\handler_name : 242 b . 243 .size \handler_name, . - \handler_name 244 .endm 245 246 def_irq_handler NMI_Handler 247 def_irq_handler HardFault_Handler 248 def_irq_handler MemManage_Handler 249 def_irq_handler BusFault_Handler 250 def_irq_handler UsageFault_Handler 251 def_irq_handler SVC_Handler 252 def_irq_handler DebugMon_Handler 253 def_irq_handler PendSV_Handler 254 /* SysTick_Handler is defined in mxc_delay.c */ 255 def_irq_handler Default_Handler 256 257 /* Device-specific Interrupts */ 258 def_irq_handler PF_IRQHandler /* 0x10 0x0040 16: Power Fail */ 259 def_irq_handler WDT0_IRQHandler /* 0x11 0x0044 17: Watchdog 0 */ 260 def_irq_handler RSV00_IRQHandler /* 0x12 0x0048 18: RSV00 */ 261 def_irq_handler RTC_IRQHandler /* 0x13 0x004C 19: RTC */ 262 def_irq_handler RSV1_IRQHandler /* 0x14 0x0050 20: RSV1 */ 263 def_irq_handler TMR0_IRQHandler /* 0x15 0x0054 21: Timer 0 */ 264 def_irq_handler TMR1_IRQHandler /* 0x16 0x0058 22: Timer 1 */ 265 def_irq_handler TMR2_IRQHandler /* 0x17 0x005C 23: Timer 2 */ 266 def_irq_handler RSV02_IRQHandler /* 0x18 0x0060 24: RSV02 */ 267 def_irq_handler RSV03_IRQHandler /* 0x19 0x0064 25: RSV03 */ 268 def_irq_handler RSV04_IRQHandler /* 0x1A 0x0068 26: RSV04 */ 269 def_irq_handler RSV05_IRQHandler /* 0x1B 0x006C 27: RSV05 */ 270 def_irq_handler RSV06_IRQHandler /* 0x1C 0x0070 28: RSV06 */ 271 def_irq_handler I2C0_IRQHandler /* 0x1D 0x0074 29: I2C0 */ 272 def_irq_handler UART0_IRQHandler /* 0x1E 0x0078 30: UART 0 */ 273 def_irq_handler UART1_IRQHandler /* 0x1F 0x007C 31: UART 1 */ 274 def_irq_handler SPI0_IRQHandler /* 0x20 0x0080 32: SPIY17 */ 275 def_irq_handler SPI1_IRQHandler /* 0x21 0x0084 33: SPIMSS */ 276 def_irq_handler RSV07_IRQHandler /* 0x22 0x0088 34: RSV07 */ 277 def_irq_handler RSV08_IRQHandler /* 0x23 0x008C 35: RSV08 */ 278 def_irq_handler RSV09_IRQHandler /* 0x24 0x0090 36: RSV09 */ 279 def_irq_handler RSV10_IRQHandler /* 0x25 0x0094 37: RSV10 */ 280 def_irq_handler RSV11_IRQHandler /* 0x26 0x0098 38: RSV11 */ 281 def_irq_handler FLC_IRQHandler /* 0x27 0x009C 39: FLC */ 282 def_irq_handler GPIO0_IRQHandler /* 0x28 0x00A0 40: GPIO0 */ 283 def_irq_handler RSV12_IRQHandler /* 0x29 0x00A4 41: RSV12 */ 284 def_irq_handler RSV13_IRQHandler /* 0x2A 0x00A8 42: RSV13 */ 285 def_irq_handler RSV14_IRQHandler /* 0x2B 0x00AC 43: RSV14 */ 286 def_irq_handler DMA0_IRQHandler /* 0x2C 0x00B0 44: DMA0 */ 287 def_irq_handler DMA1_IRQHandler /* 0x2D 0x00B4 45: DMA1 */ 288 def_irq_handler DMA2_IRQHandler /* 0x2E 0x00B8 46: DMA2 */ 289 def_irq_handler DMA3_IRQHandler /* 0x2F 0x00BC 47: DMA3 */ 290 def_irq_handler RSV15_IRQHandler /* 0x30 0x00C0 48: RSV15 */ 291 def_irq_handler RSV16_IRQHandler /* 0x31 0x00C4 49: RSV16 */ 292 def_irq_handler RSV17_IRQHandler /* 0x32 0x00C8 50: RSV17 */ 293 def_irq_handler RSV18_IRQHandler /* 0x33 0x00CC 51: RSV18 */ 294 def_irq_handler I2C1_IRQHandler /* 0x34 0x00D0 52: I2C1 */ 295 def_irq_handler RSV19_IRQHandler /* 0x35 0x00D4 53: RSV19 */ 296 def_irq_handler RSV20_IRQHandler /* 0x36 0x00D8 54: RSV20 */ 297 def_irq_handler RSV21_IRQHandler /* 0x37 0x00DC 55: RSV21 */ 298 def_irq_handler RSV22_IRQHandler /* 0x38 0x00E0 56: RSV22 */ 299 def_irq_handler RSV23_IRQHandler /* 0x39 0x00E4 57: RSV23 */ 300 def_irq_handler RSV24_IRQHandler /* 0x3A 0x00E8 58: RSV24 */ 301 def_irq_handler RSV25_IRQHandler /* 0x3B 0x00EC 59: RSV25 */ 302 def_irq_handler RSV26_IRQHandler /* 0x3C 0x00F0 60: RSV26 */ 303 def_irq_handler RSV27_IRQHandler /* 0x3D 0x00F4 61: RSV27 */ 304 def_irq_handler RSV28_IRQHandler /* 0x3E 0x00F8 62: RSV28 */ 305 def_irq_handler RSV29_IRQHandler /* 0x3F 0x00FC 63: RSV29 */ 306 def_irq_handler RSV30_IRQHandler /* 0x40 0x0100 64: RSV30 */ 307 def_irq_handler RSV31_IRQHandler /* 0x41 0x0104 65: RSV31 */ 308 def_irq_handler RSV32_IRQHandler /* 0x42 0x0108 66: RSV32 */ 309 def_irq_handler RSV33_IRQHandler /* 0x43 0x010C 67: RSV33 */ 310 def_irq_handler RSV34_IRQHandler /* 0x44 0x0110 68: RSV34 */ 311 def_irq_handler RSV35_IRQHandler /* 0x45 0x0114 69: RSV35 */ 312 def_irq_handler GPIOWAKE_IRQHandler /* 0x46 0x0118 70: GPIO Wakeup */ 313 314 .end 315