1 /**
2 * @file spi.c
3 * @brief This file contains the function implementations for the
4 * Serial Peripheral Interface (SPIMSS) peripheral module.
5 */
6
7 /* *****************************************************************************
8 * Copyright (C) 2017 Maxim Integrated Products, Inc., All Rights Reserved.
9 *
10 * Permission is hereby granted, free of charge, to any person obtaining a
11 * copy of this software and associated documentation files (the "Software"),
12 * to deal in the Software without restriction, including without limitation
13 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
14 * and/or sell copies of the Software, and to permit persons to whom the
15 * Software is furnished to do so, subject to the following conditions:
16 *
17 * The above copyright notice and this permission notice shall be included
18 * in all copies or substantial portions of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
24 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26 * OTHER DEALINGS IN THE SOFTWARE.
27 *
28 * Except as contained in this notice, the name of Maxim Integrated
29 * Products, Inc. shall not be used except as stated in the Maxim Integrated
30 * Products, Inc. Branding Policy.
31 *
32 * The mere transfer of this software does not imply any licenses
33 * of trade secrets, proprietary technology, copyrights, patents,
34 * trademarks, maskwork rights, or any other form of intellectual
35 * property whatsoever. Maxim Integrated Products, Inc. retains all
36 * ownership rights.
37 *
38 * $Date: 2018-10-17 14:16:30 -0500 (Wed, 17 Oct 2018) $
39 * $Revision: 38560 $
40 *
41 **************************************************************************** */
42
43 /* **** Includes **** */
44 #include "spi.h"
45 #include "mxc_sys.h"
46 #include "spimss.h"
47 #include "spi17y.h"
48
49 /**
50 * @ingroup spi
51 * @{
52 */
53
54 /***** Definitions *****/
55
56
57 /***** Functions *****/
58
59
60 /* ************************************************************************ */
SPI_Init(spi_type spi_name,unsigned mode,unsigned freq)61 int SPI_Init(spi_type spi_name, unsigned mode, unsigned freq)
62 {
63 sys_cfg_spimss_t spimss_cfg;
64 sys_cfg_spi17y_t spi17y_cfg;
65 int error = E_NO_ERROR;
66
67 if (spi_name == SPI0A) {
68 spi17y_cfg.map = MAP_A;
69 error = SPI17Y_Init(MXC_SPI17Y, mode, freq, &spi17y_cfg);
70
71 } else if(spi_name == SPI1A) {
72 spimss_cfg.map = MAP_A;
73 error = SPIMSS_Init(MXC_SPIMSS, mode, freq, &spimss_cfg);
74
75 } else if(spi_name == SPI1B) {
76 spimss_cfg.map = MAP_B;
77 error = SPIMSS_Init(MXC_SPIMSS, mode, freq, &spimss_cfg);
78
79 } else {
80 return E_BAD_PARAM;
81 }
82
83 return error;
84 }
85
86 /* ************************************************************************ */
SPI_MasterTransAsync(spi_type spi_name,spi_req_t * req)87 int SPI_MasterTransAsync(spi_type spi_name, spi_req_t *req)
88 {
89 int error = E_NO_ERROR;
90
91 if (spi_name == SPI0A) {
92 error = SPI17Y_MasterTransAsync(MXC_SPI17Y, (spi17y_req_t *) req);
93
94 } else if((spi_name == SPI1A) || (spi_name == SPI1B)) {
95 error = SPIMSS_MasterTransAsync(MXC_SPIMSS, (spimss_req_t *) req);
96
97 } else {
98 return E_BAD_PARAM;
99 }
100
101 return error;
102 }
103
104
105 /* ************************************************************************ */
SPI_MasterTrans(spi_type spi_name,spi_req_t * req)106 int SPI_MasterTrans(spi_type spi_name, spi_req_t *req)
107 {
108 int error = E_NO_ERROR;
109
110 if (spi_name == SPI0A) {
111 error = SPI17Y_MasterTrans(MXC_SPI17Y, (spi17y_req_t *) req);
112
113 } else if((spi_name == SPI1A) || (spi_name == SPI1B)) {
114 error = SPIMSS_MasterTrans(MXC_SPIMSS, (spimss_req_t *) req);
115
116 } else {
117 return E_BAD_PARAM;
118 }
119
120 return error;
121 }
122
123 /* ************************************************************************ */
SPI_SlaveTrans(spi_type spi_name,spi_req_t * req)124 int SPI_SlaveTrans(spi_type spi_name, spi_req_t *req)
125 {
126 int error = E_NO_ERROR;
127
128 if (spi_name == SPI0A) {
129 error = SPI17Y_SlaveTrans(MXC_SPI17Y, (spi17y_req_t *) req);
130
131 } else if ((spi_name == SPI1A) || (spi_name == SPI1B)) {
132 error = SPIMSS_SlaveTrans(MXC_SPIMSS, (spimss_req_t *) req);
133
134 } else {
135 return E_BAD_PARAM;
136 }
137
138 return error;
139 }
140
141 /* ************************************************************************ */
SPI_SlaveTransAsync(spi_type spi_name,spi_req_t * req)142 int SPI_SlaveTransAsync(spi_type spi_name, spi_req_t *req)
143 {
144 int error = E_NO_ERROR;
145
146 if (spi_name == SPI0A) {
147 error = SPI17Y_SlaveTransAsync(MXC_SPI17Y, (spi17y_req_t *) req);
148
149 } else if ((spi_name == SPI1A) || (spi_name == SPI1B)) {
150 error = SPIMSS_SlaveTransAsync(MXC_SPIMSS, (spimss_req_t *) req);
151
152 } else {
153 return E_BAD_PARAM;
154 }
155
156 return error;
157 }
158
159 /* ************************************************************************ */
SPI_Shutdown(spi_type spi_name)160 int SPI_Shutdown(spi_type spi_name)
161 {
162 int error = E_NO_ERROR;
163
164 if (spi_name == SPI0A) {
165 error = SPI17Y_Shutdown(MXC_SPI17Y);
166
167 } else if ((spi_name == SPI1A) || (spi_name == SPI1B)) {
168 error = SPIMSS_Shutdown(MXC_SPIMSS);
169
170 } else {
171 return E_BAD_PARAM;
172 }
173
174 return error;
175 }
176
177
178 /* ************************************************************************ */
SPI_AbortAsync(spi_type spi_name,spi_req_t * req)179 int SPI_AbortAsync(spi_type spi_name, spi_req_t *req)
180 {
181 int error = E_NO_ERROR;
182
183 if (spi_name == SPI0A) {
184 error = SPI17Y_AbortAsync((spi17y_req_t *) req);
185
186 } else if ((spi_name == SPI1A) || (spi_name == SPI1B)) {
187 error = SPIMSS_AbortAsync((spimss_req_t *) req);
188
189 } else {
190 return E_BAD_PARAM;
191 }
192
193 return error;
194 }
195
196 /* ************************************************************************ */
SPI_Handler(spi_type spi_name)197 int SPI_Handler(spi_type spi_name)
198 {
199 if (spi_name == SPI0A) {
200 SPI17Y_Handler(MXC_SPI17Y);
201
202 } else if ((spi_name == SPI1A) || (spi_name == SPI1B)) {
203 SPIMSS_Handler(MXC_SPIMSS);
204
205 } else {
206 return E_BAD_PARAM;
207 }
208
209 return E_NO_ERROR;
210 }
211
212 // *****************************************************************************
SPI_Enable(spi_type spi_name)213 int SPI_Enable(spi_type spi_name)
214 {
215 if (spi_name == SPI0A) {
216 SPI17Y_Enable(MXC_SPI17Y);
217
218 } else if ((spi_name == SPI1A) || (spi_name == SPI1B)) {
219 return E_NOT_SUPPORTED;
220 } else {
221 return E_BAD_PARAM;
222 }
223 return E_NO_ERROR;
224 }
225
226 // *****************************************************************************
SPI_Disable(spi_type spi_name)227 int SPI_Disable(spi_type spi_name)
228 {
229 if (spi_name == SPI0A) {
230 SPI17Y_Disable(MXC_SPI17Y);
231
232 } else if ((spi_name == SPI1A) || (spi_name == SPI1B)) {
233 return E_NOT_SUPPORTED;
234 } else {
235 return E_BAD_PARAM;
236 }
237 return E_NO_ERROR;
238 }
239
240 // *****************************************************************************
SPI_Clear_fifo(spi_type spi_name)241 int SPI_Clear_fifo(spi_type spi_name)
242 {
243 if (spi_name == SPI0A) {
244 SPI17Y_Clear_fifo(MXC_SPI17Y);
245
246 } else if ((spi_name == SPI1A) || (spi_name == SPI1B)) {
247 return E_NOT_SUPPORTED;
248 } else {
249 return E_BAD_PARAM;
250 }
251 return E_NO_ERROR;
252 }
253
254 /**@} end of group spi */
255