1 /* 2 * Copyright (c) 2006-2023, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Email Notes 8 * 2019-07-16 Kevin.Liu kevin.liu.mchp@gmail.com First Release 9 * 2023-09-16 luhuadong luhuadong@163.com fix uart config 10 */ 11 #ifndef __BOARD_H__ 12 #define __BOARD_H__ 13 14 // <o> Internal SRAM memory size[Kbytes] <4-32> 15 // <i>Default: 32 16 #if defined(__SAMC21E15A__) || defined(__ATSAMC21E15A__) 17 #define SAMC21_SRAM_SIZE 4 18 #elif defined(__SAMC21E16A__) || defined(__ATSAMC21E16A__) 19 #define SAMC21_SRAM_SIZE 8 20 #elif defined(__SAMC21E17A__) || defined(__ATSAMC21E17A__) 21 #define SAMC21_SRAM_SIZE 16 22 #elif defined(__SAMC21E18A__) || defined(__ATSAMC21E18A__) 23 #define SAMC21_SRAM_SIZE 32 24 #elif defined(__SAMC21G15A__) || defined(__ATSAMC21G15A__) 25 #define SAMC21_SRAM_SIZE 4 26 #elif defined(__SAMC21G16A__) || defined(__ATSAMC21G16A__) 27 #define SAMC21_SRAM_SIZE 8 28 #elif defined(__SAMC21G17A__) || defined(__ATSAMC21G17A__) 29 #define SAMC21_SRAM_SIZE 16 30 #elif defined(__SAMC21G18A__) || defined(__ATSAMC21G18A__) 31 #define SAMC21_SRAM_SIZE 32 32 #elif defined(__SAMC21J15A__) || defined(__ATSAMC21J15A__) 33 #define SAMC21_SRAM_SIZE 4 34 #elif defined(__SAMC21J16A__) || defined(__ATSAMC21J16A__) 35 #define SAMC21_SRAM_SIZE 8 36 #elif defined(__SAMC21J17A__) || defined(__ATSAMC21J17A__) 37 #define SAMC21_SRAM_SIZE 16 38 #elif defined(__SAMC21J17AU__) || defined(__ATSAMC21J17AU__) 39 #define SAMC21_SRAM_SIZE 16 40 #elif defined(__SAMC21J18A__) || defined(__ATSAMC21J18A__) 41 #define SAMC21_SRAM_SIZE 32 42 #elif defined(__SAMC21J18AU__) || defined(__ATSAMC21J18AU__) 43 #define SAMC21_SRAM_SIZE 32 44 #else 45 #error Board does not support the specified device. 46 #endif 47 48 #define SAMC21_SRAM_END (0x20000000 + SAMC21_SRAM_SIZE * 1024) 49 50 #if defined(__ARMCC_VERSION) 51 extern int Image$$RW_IRAM1$$ZI$$Limit; 52 #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) 53 #elif __ICCARM__ 54 #pragma section="HEAP" 55 #define HEAP_BEGIN (__segment_begin("HEAP")) 56 #define HEAP_END (__segment_end("HEAP")) 57 #else 58 extern int __bss_end; 59 #define HEAP_BEGIN (&__bss_end) 60 #define HEAP_END SAMC21_SRAM_END 61 #endif 62 63 #ifdef RT_USING_SERIAL 64 #include "hpl_sercom_config.h" 65 #define DEFAULT_USART_BAUD_RATE CONF_SERCOM_4_USART_BAUD 66 #endif 67 68 void rt_hw_board_init(void); 69 70 #endif 71 72