1 /*
2 * Code generated from Atmel Start.
3 *
4 * This file will be overwritten when reconfiguring your Atmel Start project.
5 * Please copy examples or other code you want to keep to a separate file
6 * to avoid losing it when reconfiguring.
7 */
8
9 #include "driver_init.h"
10 #include <peripheral_clk_config.h>
11 #include <utils.h>
12 #include <hal_init.h>
13
14 #include <hpl_adc_base.h>
15
16 /*! The buffer size for USART */
17 #define TARGET_IO_BUFFER_SIZE 16
18
19 struct usart_async_descriptor TARGET_IO;
20 struct can_async_descriptor CAN_0;
21
22 static uint8_t TARGET_IO_buffer[TARGET_IO_BUFFER_SIZE];
23
24 struct adc_sync_descriptor ADC_0;
25
26 struct flash_descriptor FLASH_0;
27
28 struct i2c_m_sync_desc I2C_0;
29
ADC_0_PORT_init(void)30 void ADC_0_PORT_init(void)
31 {
32
33 // Disable digital pin circuitry
34 gpio_set_pin_direction(PA10, GPIO_DIRECTION_OFF);
35
36 gpio_set_pin_function(PA10, PINMUX_PA10B_ADC0_AIN10);
37 }
38
ADC_0_CLOCK_init(void)39 void ADC_0_CLOCK_init(void)
40 {
41 hri_mclk_set_APBCMASK_ADC0_bit(MCLK);
42 hri_gclk_write_PCHCTRL_reg(GCLK, ADC0_GCLK_ID, CONF_GCLK_ADC0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
43 }
44
ADC_0_init(void)45 void ADC_0_init(void)
46 {
47 ADC_0_CLOCK_init();
48 ADC_0_PORT_init();
49 adc_sync_init(&ADC_0, ADC0, _adc_get_adc_sync());
50 }
51
FLASH_0_CLOCK_init(void)52 void FLASH_0_CLOCK_init(void)
53 {
54
55 hri_mclk_set_AHBMASK_NVMCTRL_bit(MCLK);
56 }
57
FLASH_0_init(void)58 void FLASH_0_init(void)
59 {
60 FLASH_0_CLOCK_init();
61 flash_init(&FLASH_0, NVMCTRL);
62 }
63
I2C_0_PORT_init(void)64 void I2C_0_PORT_init(void)
65 {
66
67 gpio_set_pin_pull_mode(PA08,
68 // <y> Pull configuration
69 // <id> pad_pull_config
70 // <GPIO_PULL_OFF"> Off
71 // <GPIO_PULL_UP"> Pull-up
72 // <GPIO_PULL_DOWN"> Pull-down
73 GPIO_PULL_OFF);
74
75 gpio_set_pin_function(PA08, PINMUX_PA08C_SERCOM0_PAD0);
76
77 gpio_set_pin_pull_mode(PA09,
78 // <y> Pull configuration
79 // <id> pad_pull_config
80 // <GPIO_PULL_OFF"> Off
81 // <GPIO_PULL_UP"> Pull-up
82 // <GPIO_PULL_DOWN"> Pull-down
83 GPIO_PULL_OFF);
84
85 gpio_set_pin_function(PA09, PINMUX_PA09C_SERCOM0_PAD1);
86 }
87
I2C_0_CLOCK_init(void)88 void I2C_0_CLOCK_init(void)
89 {
90 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_CORE, CONF_GCLK_SERCOM0_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
91 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_SLOW, CONF_GCLK_SERCOM0_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
92 hri_mclk_set_APBCMASK_SERCOM0_bit(MCLK);
93 }
94
I2C_0_init(void)95 void I2C_0_init(void)
96 {
97 I2C_0_CLOCK_init();
98 i2c_m_sync_init(&I2C_0, SERCOM0);
99 I2C_0_PORT_init();
100 }
101
102 /**
103 * \brief USART Clock initialization function
104 *
105 * Enables register interface and peripheral clock
106 */
TARGET_IO_CLOCK_init()107 void TARGET_IO_CLOCK_init()
108 {
109
110 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM4_GCLK_ID_CORE, CONF_GCLK_SERCOM4_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
111 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM4_GCLK_ID_SLOW, CONF_GCLK_SERCOM4_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
112 hri_mclk_set_APBCMASK_SERCOM4_bit(MCLK);
113 }
114
115 /**
116 * \brief USART pinmux initialization function
117 *
118 * Set each required pin to USART functionality
119 */
TARGET_IO_PORT_init()120 void TARGET_IO_PORT_init()
121 {
122
123 gpio_set_pin_function(PB10, PINMUX_PB10D_SERCOM4_PAD2);
124
125 gpio_set_pin_function(PB11, PINMUX_PB11D_SERCOM4_PAD3);
126 }
127
128 /**
129 * \brief USART initialization function
130 *
131 * Enables USART peripheral, clocks and initializes USART driver
132 */
TARGET_IO_init(void)133 void TARGET_IO_init(void)
134 {
135 TARGET_IO_CLOCK_init();
136 usart_async_init(&TARGET_IO, SERCOM4, TARGET_IO_buffer, TARGET_IO_BUFFER_SIZE, (void *)NULL);
137 TARGET_IO_PORT_init();
138 }
139
CAN_0_PORT_init(void)140 void CAN_0_PORT_init(void)
141 {
142
143 gpio_set_pin_function(PA25, PINMUX_PA25G_CAN0_RX);
144
145 gpio_set_pin_function(PA24, PINMUX_PA24G_CAN0_TX);
146 }
147 /**
148 * \brief CAN initialization function
149 *
150 * Enables CAN peripheral, clocks and initializes CAN driver
151 */
CAN_0_init(void)152 void CAN_0_init(void)
153 {
154 hri_mclk_set_AHBMASK_CAN0_bit(MCLK);
155 hri_gclk_write_PCHCTRL_reg(GCLK, CAN0_GCLK_ID, CONF_GCLK_CAN0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
156 can_async_init(&CAN_0, CAN0);
157 CAN_0_PORT_init();
158 }
159
system_init(void)160 void system_init(void)
161 {
162 init_mcu();
163
164 // GPIO on PA15
165
166 gpio_set_pin_level(LED0,
167 // <y> Initial level
168 // <id> pad_initial_level
169 // <false"> Low
170 // <true"> High
171 false);
172
173 // Set pin direction to output
174 gpio_set_pin_direction(LED0, GPIO_DIRECTION_OUT);
175
176 gpio_set_pin_function(LED0, GPIO_PIN_FUNCTION_OFF);
177
178 ADC_0_init();
179
180 FLASH_0_init();
181
182 I2C_0_init();
183 TARGET_IO_init();
184 CAN_0_init();
185 }
186