1 /* 2 * Copyright (c) 2006-2023, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Email Notes 8 * 2023-09-16 luhuadong luhuadong@163.com First Release 9 */ 10 #ifndef __BOARD_H__ 11 #define __BOARD_H__ 12 13 // <o> Internal SRAM memory size[Kbytes] <128-256> 14 // <i>Default: 256 15 #if defined(__SAMD51J18A__) || defined(__ATSAMD51J18A__) 16 #define SAME5x_SRAM_SIZE 128 17 #elif defined(__SAMD51J19A__) || defined(__ATSAMD51J19A__) 18 #define SAME5x_SRAM_SIZE 192 19 #elif defined(__SAMD51J20A__) || defined(__ATSAMD51J20A__) 20 #define SAME5x_SRAM_SIZE 256 21 #elif defined(__SAMD51N19A__) || defined(__ATSAMD51N19A__) 22 #define SAME5x_SRAM_SIZE 192 23 #elif defined(__SAMD51N20A__) || defined(__ATSAMD51N20A__) 24 #define SAME5x_SRAM_SIZE 256 25 #elif defined(__SAMD51P19A__) || defined(__ATSAMD51P19A__) 26 #define SAME5x_SRAM_SIZE 192 27 #elif defined(__SAMD51P20A__) || defined(__ATSAMD51P20A__) 28 #define SAME5x_SRAM_SIZE 256 29 #elif defined(__SAME54N19A__) || defined(__ATSAME54N19A__) 30 #define SAME5x_SRAM_SIZE 192 31 #elif defined(__SAME54N20A__) || defined(__ATSAME54N20A__) 32 #define SAME5x_SRAM_SIZE 256 33 #elif defined(__SAME54P19A__) || defined(__ATSAME54P19A__) 34 #define SAME5x_SRAM_SIZE 192 35 #elif defined(__SAME54P20A__) || defined(__ATSAME54P20A__) 36 #define SAME5x_SRAM_SIZE 256 37 #elif defined(__SAME53J18A__) || defined(__ATSAME53J18A__) 38 #define SAME5x_SRAM_SIZE 128 39 #elif defined(__SAME53J19A__) || defined(__ATSAME53J19A__) 40 #define SAME5x_SRAM_SIZE 192 41 #elif defined(__SAME53J20A__) || defined(__ATSAME53J20A__) 42 #define SAME5x_SRAM_SIZE 256 43 #elif defined(__SAME53N19A__) || defined(__ATSAME53N19A__) 44 #define SAME5x_SRAM_SIZE 192 45 #elif defined(__SAME53N20A__) || defined(__ATSAME53N20A__) 46 #define SAME5x_SRAM_SIZE 256 47 #elif defined(__SAME51J18A__) || defined(__ATSAME51J18A__) 48 #define SAME5x_SRAM_SIZE 128 49 #elif defined(__SAME51J19A__) || defined(__ATSAME51J19A__) 50 #define SAME5x_SRAM_SIZE 192 51 #elif defined(__SAME51J20A__) || defined(__ATSAME51J20A__) 52 #define SAME5x_SRAM_SIZE 256 53 #elif defined(__SAME51N19A__) || defined(__ATSAME51N19A__) 54 #define SAME5x_SRAM_SIZE 192 55 #elif defined(__SAME51N20A__) || defined(__ATSAME51N20A__) 56 #define SAME5x_SRAM_SIZE 256 57 #else 58 #error Board does not support the specified device. 59 #endif 60 61 #define SAME5x_SRAM_END (0x20000000 + SAME5x_SRAM_SIZE * 1024) 62 63 #if defined(__ARMCC_VERSION) 64 extern int Image$$RW_IRAM1$$ZI$$Limit; 65 #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) 66 #elif __ICCARM__ 67 #pragma section="HEAP" 68 #define HEAP_BEGIN (__segment_begin("HEAP")) 69 #define HEAP_END (__segment_end("HEAP")) 70 #else 71 extern int __bss_end; 72 #define HEAP_BEGIN (&__bss_end) 73 #define HEAP_END SAME5x_SRAM_END 74 #endif 75 76 #ifdef RT_USING_SERIAL 77 #include "hpl_sercom_config.h" 78 #define DEFAULT_USART_BAUD_RATE CONF_SERCOM_2_USART_BAUD_RATE 79 #endif 80 81 void rt_hw_board_init(void); 82 83 #endif 84