README.md
1# SAME54P20A BSP Introduction
2
3[中文](README_zh.md)
4- MCU: ATSAME54P20A @120MHz, 1MB FLASH, 256KB RAM
5- E54: Cortex-M4F + Advanced Feature Set + Ethernet + 2x CAN-FD
6- Pin: G=48 pins, J=64 pins, N=100 pins, P=128 pins
7- Flash: 18=256KB, 19=512KB, 20=1024KB (size=2^n)
8- SRAM : 128KB(Flash 256KB), 192KB(Flash 512KB), 256KB(Flash 1MB)
9- Datasheet: <https://www.microchip.com/en-us/product/ATSAME54P20>
10
11#### KEY FEATURES
12
13#### Core
14 - 32-bit Arm® Cortex®-M4 core with single-precision FPU and 4 KB combined instruction cache and data cache; frequency up to 120 MHz, MPU, 403 CoreMark® at 120 MHz, and DSP instructions
15
16#### Memories
17 - 1 MB/512 KB/256 KB in-system self-programmable Flash with:
18 - Error Correction Code (ECC)
19 - Dual bank with Read-While-Write (RWW) support
20 - EEPROM hardware emulation
21 - 128 KB, 192 KB, 256 KB SRAM main memory
22 - 64 KB, 96 KB, 128 KB of Error Correction Code (ECC) RAM option
23 - Up to 4 KB of Tightly Coupled Memory (TCM)
24 - Up to 8 KB additional SRAM
25 - Can be retained in backup mode
26 - Eight 32-bit backup registers
27
28#### System
29 - Power-on Reset (POR) and Brown-out detection (BOD)
30 - Internal and external clock options
31 - External Interrupt Controller (EIC)
32 - 16 external interrupts
33 - One non-maskable interrupt
34 - Two-pin Serial Wire Debug (SWD) programming, test, and debugging interface
35
36#### High-Performance Peripherals
37 - 32-channel Direct Memory Access Controller (DMAC)
38 - Up to two SD/MMC Host Controller (SDHC)
39 - Up to 50 MHz operation
40 - 4-bit or 1-bit interface
41 - Compatibility with SD and SDHC memory card specification version 3.01
42 - Compatibility with SDIO specification version 3.0
43 - Compliant with JDEC specification, MMC memory cards V4.51
44 - One Quad I/O Serial Peripheral Interface (QSPI)
45 - Dedicated AHB memory zone
46 - One Ethernet MAC (SAM E53 and SAM E54)– 10/100 Mbps in MII and RMII with dedicated DMA
47 - IEEE® 1588 Precision Time Protocol (PTP) support
48 - IEEE 1588 Time Stamping Unit (TSU) support
49 - IEEE802.3AZ energy efficiency support
50 - Support for 802.1AS and 1588 precision clock synchronization protocol
51 - Wake on LAN support
52 - Up to two Controller Area Network (CAN) (that is., SAM E51 and SAM E54)
53 - Support for CAN 2.0A/CAN 2.0B and CAN-FD (ISO 11898-1:2016)
54 - One Full-Speed (12 Mbps) Universal Serial Bus (USB) 2.0 interface
55 - Embedded host and device function
56 - Eight endpoints
57 - On-chip transceiver with integrated serial resistor
58
59#### System Peripherals
60 - Up to 114 I/O lines with external interrupt capability (edge- or level-sensitivity), debouncing, glitch filtering and On-die Series Resistor Termination
61 - Five Parallel Input/Output Controllers (PIO)
62 - 32-channel Event System
63 - Up to eight Serial Communication Interfaces (SERCOM), can be configured as USART/I2C/SPI
64 - Up to eight 16-bit Timers/Counters (TC), can be configured as 8/16/32bit TC.
65 - Two 24-bit Timer/Counters for Control (TCC), with extended functions
66 - Up to Three 16-bit Timer/Counters for Control (TCC) with extended functions.
67 - 32-bit Real Time Counter (RTC) with clock/calendar function
68 - Up to 4 wake-up pins with tamper detection and debouncing filter
69 - Watchdog Timer (WDT) with Window mode
70 - CRC-32 generator
71 - One two-channel Inter-IC Sound Interface (I2S)
72 - Position Decoder (PDEC)
73 - Frequency meter (FREQM)
74 - Four Configurable Custom Logic (CCL)
75 - Dual 12-bit, 1 MSPS Analog-to-Digital Converter (ADC) with up to 16 channels each:
76 - Dual 12-bit, 1 MSPS output Digital-to-Analog Converter (DAC)
77 - Two Analog Comparators (AC) with Window Compare function
78 - One temperature sensor
79 - Parallel Capture Controller (PCC)
80 - Peripheral Touch Controller (PTC) - Capacitive Touch buttons, sliders, and wheels
81
82#### Cryptography
83 - One Advanced Encryption System (AES) with 256-bit key length and up to 2 MB/s data rate
84 - Five confidential modes of operation (ECB, CBC, CFB, OFB, CTR)
85 - Supports counter with CBC-MAC mode
86 - Galois Counter Mode (GCM) - True Random Number Generator (TRNG)
87 - Public Key Cryptography Controller (PUKCC) and associated Classical Public Key Cryptography Library (PUKCL)
88 - RSA, DSA : Elliptic Curves Cryptography (ECC) ECC GF(2n), ECC GF(p)
89 - Integrity Check Module (ICM) based on Secure Hash Algorithm (SHA1, SHA224, SHA256), DMA assisted
90
91#### I/O
92 - Up to 99 programmable I/O pins
93
94#### Qualification
95 - AEC-Q100 Grade 1 (-40°C to 125°C)
96
97#### Package Type
98 - VQFN48, 48-lead VQFN, 7x7 mm, pitch 0.5 mm, I/O Pins up to 37
99 - VQFN64, 64-lead VQFN, 9x9 mm, pitch 0.5 mm, I/O Pins up to 51
100 - TQFP64, 64-lead TQFP, 10x10 mm, pitch 0.5 mm, I/O Pins up to 51
101 - TQFP100, 100-lead TQFP, 14x14 mm, pitch 0.5 mm, I/O Pins up to 81
102 - TQFP128, 128-lead TQFP, 14x14 mm, pitch 0.4 mm, I/O Pins up to 99
103 - TFBGA120, 120-ball TFBGA, 8x8 mm, pitch 0.5 mm, I/O Pins up to 90
104
105#### Board info
106- [SAM E54 XPLAINED PRO](https://www.microchip.com/en-us/development-tool/DM320019-BNDL)
107
README_zh.md
1# SAME54P20A BSP 介绍
2
3[English](README.md)
4- MCU: ATSAME54P20A @120MHz, 1MB FLASH, 256KB RAM
5- E54: Cortex-M4F + 100M Ethernet + 2路CAN-FD
6- 管脚: G系列-48 pins, J系列-64 pins, N系列-100 pins, P系列-128 pins
7- Flash: 尾缀18=256KB, 19=512KB, 20=1024KB (size=2^n)
8- SRAM : 128KB(Flash 256KB), 192KB(Flash 512KB), 256KB(Flash 1MB)
9- 手册: <https://www.microchip.com/en-us/product/ATSAME54P20>
10
11#### 关键特性
12
13#### 内核
14 - 32-bit Arm® Cortex®-M4 内核 + 单精度FPU + 4 KB 复用的指令和数据Cache，最大工作主频120 MHz, 带MPU, 403 CoreMark®@120 MHz, 支持 DSP指令集
15
16#### 内存
17 - 1 MB/512 KB/256 KB in-system self-programmable Flash with:
18 - Error Correction Code (ECC)
19 - Dual bank with Read-While-Write (RWW) support
20 - EEPROM hardware emulation
21 - 128 KB, 192 KB, 256 KB SRAM main memory
22 - 64 KB, 96 KB, 128 KB of Error Correction Code (ECC) RAM option
23 - Up to 4 KB of Tightly Coupled Memory (TCM)
24 - Up to 8 KB additional SRAM
25 - Can be retained in backup mode
26 - Eight 32-bit backup registers
27
28#### 系统特性
29 - Power-on Reset (POR) and Brown-out detection (BOD)
30 - Internal and external clock options
31 - External Interrupt Controller (EIC)
32 - 16 external interrupts
33 - One non-maskable interrupt
34 - Two-pin Serial Wire Debug (SWD) programming, test, and debugging interface
35
36#### 高性能外设
37 - 32-channel Direct Memory Access Controller (DMAC)
38 - Up to two SD/MMC Host Controller (SDHC)
39 - Up to 50 MHz operation
40 - 4-bit or 1-bit interface
41 - Compatibility with SD and SDHC memory card specification version 3.01
42 - Compatibility with SDIO specification version 3.0
43 - Compliant with JDEC specification, MMC memory cards V4.51
44 - One Quad I/O Serial Peripheral Interface (QSPI)
45 - Dedicated AHB memory zone
46 - One Ethernet MAC (SAM E53 and SAM E54)– 10/100 Mbps in MII and RMII with dedicated DMA
47 - IEEE® 1588 Precision Time Protocol (PTP) support
48 - IEEE 1588 Time Stamping Unit (TSU) support
49 - IEEE802.3AZ energy efficiency support
50 - Support for 802.1AS and 1588 precision clock synchronization protocol
51 - Wake on LAN support
52 - Up to two Controller Area Network (CAN) (that is., SAM E51 and SAM E54)
53 - Support for CAN 2.0A/CAN 2.0B and CAN-FD (ISO 11898-1:2016)
54 - One Full-Speed (12 Mbps) Universal Serial Bus (USB) 2.0 interface
55 - Embedded host and device function
56 - Eight endpoints
57 - On-chip transceiver with integrated serial resistor
58
59#### 系统外设
60 - Up to 114 I/O lines with external interrupt capability (edge- or level-sensitivity), debouncing, glitch filtering and On-die Series Resistor Termination
61 - Five Parallel Input/Output Controllers (PIO)
62 - 32-channel Event System
63 - Up to eight Serial Communication Interfaces (SERCOM), can be configured as USART/I2C/SPI
64 - Up to eight 16-bit Timers/Counters (TC), can be configured as 8/16/32bit TC.
65 - Two 24-bit Timer/Counters for Control (TCC), with extended functions
66 - Up to Three 16-bit Timer/Counters for Control (TCC) with extended functions.
67 - 32-bit Real Time Counter (RTC) with clock/calendar function
68 - Up to 4 wake-up pins with tamper detection and debouncing filter
69 - Watchdog Timer (WDT) with Window mode
70 - CRC-32 generator
71 - One two-channel Inter-IC Sound Interface (I2S)
72 - Position Decoder (PDEC)
73 - Frequency meter (FREQM)
74 - Four Configurable Custom Logic (CCL)
75 - Dual 12-bit, 1 MSPS Analog-to-Digital Converter (ADC) with up to 16 channels each:
76 - Dual 12-bit, 1 MSPS output Digital-to-Analog Converter (DAC)
77 - Two Analog Comparators (AC) with Window Compare function
78 - One temperature sensor
79 - Parallel Capture Controller (PCC)
80 - Peripheral Touch Controller (PTC) - Capacitive Touch buttons, sliders, and wheels
81
82#### 加密功能
83 - One Advanced Encryption System (AES) with 256-bit key length and up to 2 MB/s data rate
84 - Five confidential modes of operation (ECB, CBC, CFB, OFB, CTR)
85 - Supports counter with CBC-MAC mode
86 - Galois Counter Mode (GCM) - True Random Number Generator (TRNG)
87 - Public Key Cryptography Controller (PUKCC) and associated Classical Public Key Cryptography Library (PUKCL)
88 - RSA, DSA : Elliptic Curves Cryptography (ECC) ECC GF(2n), ECC GF(p)
89 - Integrity Check Module (ICM) based on Secure Hash Algorithm (SHA1, SHA224, SHA256), DMA assisted
90
91#### I/O管脚
92 - 最多提供99个用户可编程I/O管脚
93
94#### 汽车应用
95 - AEC-Q100 Grade 1 (-40°C to 125°C)
96
97#### 封装
98 - VQFN48, 48-lead VQFN, 7x7 mm, pitch 0.5 mm, I/O Pins up to 37
99 - VQFN64, 64-lead VQFN, 9x9 mm, pitch 0.5 mm, I/O Pins up to 51
100 - TQFP64, 64-lead TQFP, 10x10 mm, pitch 0.5 mm, I/O Pins up to 51
101 - TQFP100, 100-lead TQFP, 14x14 mm, pitch 0.5 mm, I/O Pins up to 81
102 - TQFP128, 128-lead TQFP, 14x14 mm, pitch 0.4 mm, I/O Pins up to 99
103 - TFBGA120, 120-ball TFBGA, 8x8 mm, pitch 0.5 mm, I/O Pins up to 90
104
105#### 官方开发板信息
106- [SAM E54 XPLAINED PRO](https://www.microchip.com/en-us/development-tool/DM320019-BNDL)