1====================================== 2Generic IEEE 802.3 Ethernet PHY Driver 3====================================== 4 5This software component supply a generic IEEE802.3 Ethernet PHY driver. 6The PHY chip should be compliant IEEE 802.3 Ethernet Standard that 7supports MDC/MDIO management interface for PHY register configuration. 8 9The management interface specified here provides a simple, two-wire, serial 10interface to connect a management entity and a managed PHY for the purposes of 11controlling the PHY and gathering status from the PHY. This interface is 12referred to as the MII Management Interface. 13 14The management interface consists of a pair of signals that physically 15transport the management information across the MII or GMII, a frame format 16and a protocol specification for exchanging management frames, and a register 17set that can be read and written using these frames. The register definition 18specifies a basic register set with an extension mechanism. The MII uses two 19basic registers. The GMII also uses the same two basic registers and adds a 20third basic register. 21 22The MII basic register set consists of two registers referred to as the Control 23register (Register 0) and the Status register (Register 1). All PHYs that 24provide an MII shall incorporate the basic register set. All PHYs that provide 25a GMII shall incorporate an extended basic register set consisting of the 26Control register (Register 0), Status register (Register 1), and Extended 27Status register (Register 15). The status and control functions defined here 28are considered basic and fundamental to 100 Mb/s and 1000 Mb/s PHYs. 29Registers 2 through 14 are part of the extended register set. The format of 30Registers 4 through 10 are defined for the specific Auto-Negotiation protocol 31used (Clause 28 or Clause 37). The format of these registers is selected by 32the bit settings of Registers 1 and 15. 33More information please refer to IEEE Std 802.3 Chapter 22.2.4 34 35Features 36-------- 37 38* Initialization the Ethernet PHY driver with Ethernet MAC communication 39* Setting PHY address 40* Reading/Writing register from PHY device 41* Setting/Clearing register bit from PHY device 42* Enabling/Disabling Power Down 43* Restart Auto Negotiation 44* Enabling/Disabling Loop Back 45* Getting Link Status 46* Reset PHY device 47 48Dependencies 49------------ 50 51* An instance of the Ethernet MAC driver is used by this driver. 52 53Limitations 54----------- 55 56N/A 57