1=============================
2I2C Master synchronous driver
3=============================
4
5I2C (Inter-Integrated Circuit) is a two wire serial interface usually used
6for on-board low-speed bi-directional communication between controllers and
7peripherals. The master device is responsible for initiating and controlling
8all transfers on the I2C bus. Only one master device can be active on the I2C
9bus at the time, but the master role can be transferred between devices on the
10same I2C bus. I2C uses only two bidirectional open-drain lines, usually
11designated SDA (Serial Data Line) and SCL (Serial Clock Line), with pull up
12resistors.
13
14The stop condition is automatically controlled by the driver if the I/O write and
15read functions are used, but can be manually controlled by using the
16i2c_m_sync_transfer function.
17
18Often a master accesses different information in the slave by accessing
19different registers in the slave. This is done by first sending a message to
20the target slave containing the register address, followed by a repeated start
21condition (no stop condition between) ending with transferring register data.
22This scheme is supported by the i2c_m_sync_cmd_write and i2c_m_sync_cmd_read
23function, but limited to 8-bit register addresses.
24
25I2C Modes (standard mode/fastmode+/highspeed mode) can only be selected in
26Atmel Start. If the SCL frequency (baudrate) has changed run-time, make sure to
27stick within the SCL clock frequency range supported by the selected mode.
28The requested SCL clock frequency is not validated by the
29i2c_m_sync_set_baudrate function against the selected I2C mode.
30
31Features
32--------
33
34	* I2C Master support
35	* Initialization and de-initialization
36	* Enabling and disabling
37	* Run-time bus speed configuration
38	* Write and read I2C messages
39	* Slave register access functions (limited to 8-bit address)
40	* Manual or automatic stop condition generation
41	* 10- and 7- bit addressing
42	* I2C Modes supported
43	       +----------------------+-------------------+
44	       |* Standard/Fast mode  | (SCL: 1 - 400kHz) |
45	       +----------------------+-------------------+
46	       |* Fastmode+           | (SCL: 1 - 1000kHz)|
47	       +----------------------+-------------------+
48	       |* Highspeed mode      | (SCL: 1 - 3400kHz)|
49	       +----------------------+-------------------+
50
51Applications
52------------
53
54* Transfer data to and from one or multiple I2C slaves like I2C connected sensors, data storage or other I2C capable peripherals
55* Data communication between micro controllers
56* Controlling displays
57
58Dependencies
59------------
60
61* I2C Master capable hardware
62
63Concurrency
64-----------
65
66N/A
67
68Limitations
69-----------
70
71General
72^^^^^^^
73
74	* System Managmenet Bus (SMBus) not supported.
75	* Power Management Bus (PMBus) not supported.
76
77Clock considerations
78^^^^^^^^^^^^^^^^^^^^
79
80The register value for the requested I2C speed is calculated and placed in the correct register, but not validated if it works correctly with the clock/prescaler settings used for the module. To validate the I2C speed setting use the formula found in the configuration file for the module. Selectable speed is automatically limited within the speed range defined by the I2C mode selected.
81
82Known issues and workarounds
83----------------------------
84
85N/A
86
87
88