1 /**
2  * \file
3  *
4  * \brief MAC functionality implementation.
5  *
6  * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
7  *
8  * \asf_license_start
9  *
10  * \page License
11  *
12  * Subject to your compliance with these terms, you may use Microchip
13  * software and any derivatives exclusively with Microchip products.
14  * It is your responsibility to comply with third party license terms applicable
15  * to your use of third party software (including open source software) that
16  * may accompany Microchip software.
17  *
18  * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
19  * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
20  * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
21  * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
22  * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
23  * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
24  * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
25  * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.  TO THE FULLEST EXTENT
26  * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
27  * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
28  * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
29  *
30  * \asf_license_stop
31  *
32  */
33 #include <hal_mac_async.h>
34 #include <utils_assert.h>
35 /**
36  * \brief Driver version
37  */
38 #define DRIVER_VERSION 0x00000001u
39 
40 /* Private function */
41 static void mac_read_cb(struct _mac_async_device *dev);
42 static void mac_write_cb(struct _mac_async_device *dev);
43 
44 /**
45  * \brief Initialize the MAC driver
46  */
mac_async_init(struct mac_async_descriptor * const descr,void * const hw)47 int32_t mac_async_init(struct mac_async_descriptor *const descr, void *const hw)
48 {
49 	ASSERT(descr && hw);
50 
51 	return _mac_async_init(&descr->dev, hw);
52 }
53 
54 /**
55  * \brief Deinitialize the MAC driver
56  */
mac_async_deinit(struct mac_async_descriptor * const descr)57 int32_t mac_async_deinit(struct mac_async_descriptor *const descr)
58 {
59 	ASSERT(descr);
60 
61 	return _mac_async_deinit(&descr->dev);
62 }
63 
64 /**
65  * \brief Enable the MAC
66  */
mac_async_enable(struct mac_async_descriptor * const descr)67 int32_t mac_async_enable(struct mac_async_descriptor *const descr)
68 {
69 	ASSERT(descr);
70 
71 	return _mac_async_enable(&descr->dev);
72 }
73 /**
74  * \brief Disable the MAC
75  */
mac_async_disable(struct mac_async_descriptor * const descr)76 int32_t mac_async_disable(struct mac_async_descriptor *const descr)
77 {
78 	ASSERT(descr);
79 
80 	return _mac_async_disable(&descr->dev);
81 }
82 /**
83  * \brief Write raw data to MAC
84  */
mac_async_write(struct mac_async_descriptor * const descr,uint8_t * buf,uint32_t len)85 int32_t mac_async_write(struct mac_async_descriptor *const descr, uint8_t *buf, uint32_t len)
86 {
87 	ASSERT(descr && buf && len);
88 
89 	return _mac_async_write(&descr->dev, buf, len);
90 }
91 
92 /**
93  * \brief Read raw data from MAC
94  */
mac_async_read(struct mac_async_descriptor * const descr,uint8_t * buf,uint32_t len)95 uint32_t mac_async_read(struct mac_async_descriptor *const descr, uint8_t *buf, uint32_t len)
96 {
97 	ASSERT(descr);
98 
99 	return _mac_async_read(&descr->dev, buf, len);
100 }
101 
102 /**
103  * \brief Get next valid package length
104  */
mac_async_read_len(struct mac_async_descriptor * const descr)105 uint32_t mac_async_read_len(struct mac_async_descriptor *const descr)
106 {
107 	ASSERT(descr);
108 
109 	return _mac_async_read_len(&descr->dev);
110 }
111 /**
112  * \brief Enable the MAC IRQ
113  */
mac_async_enable_irq(struct mac_async_descriptor * const descr)114 void mac_async_enable_irq(struct mac_async_descriptor *const descr)
115 {
116 	ASSERT(descr);
117 
118 	_mac_async_enable_irq(&descr->dev);
119 }
120 
121 /**
122  * \brief Disable the MAC IRQ
123  */
mac_async_disable_irq(struct mac_async_descriptor * const descr)124 void mac_async_disable_irq(struct mac_async_descriptor *const descr)
125 {
126 	ASSERT(descr);
127 
128 	_mac_async_disable_irq(&descr->dev);
129 }
130 
131 /**
132  * \brief Register the MAC callback function
133  */
mac_async_register_callback(struct mac_async_descriptor * const descr,const enum mac_async_cb_type type,const FUNC_PTR func)134 int32_t mac_async_register_callback(struct mac_async_descriptor *const descr, const enum mac_async_cb_type type,
135                                     const FUNC_PTR func)
136 {
137 	ASSERT(descr);
138 
139 	switch (type) {
140 	case MAC_ASYNC_RECEIVE_CB:
141 		descr->cb.receive = (mac_async_cb_t)func;
142 		return _mac_async_register_callback(&descr->dev, type, (func == NULL) ? NULL : (FUNC_PTR)mac_read_cb);
143 	case MAC_ASYNC_TRANSMIT_CB:
144 		descr->cb.transmit = (mac_async_cb_t)func;
145 		return _mac_async_register_callback(&descr->dev, type, (func == NULL) ? NULL : (FUNC_PTR)mac_write_cb);
146 	default:
147 		return ERR_INVALID_ARG;
148 	}
149 }
150 /**
151  * \brief Set MAC filter
152  */
mac_async_set_filter(struct mac_async_descriptor * const descr,uint8_t index,struct mac_async_filter * filter)153 int32_t mac_async_set_filter(struct mac_async_descriptor *const descr, uint8_t index, struct mac_async_filter *filter)
154 {
155 	ASSERT(descr && filter);
156 
157 	return _mac_async_set_filter(&descr->dev, index, filter);
158 }
159 
160 /**
161  * \brief Set MAC filter (expaneded)
162  */
mac_async_set_filter_ex(struct mac_async_descriptor * const descr,uint8_t mac[6])163 int32_t mac_async_set_filter_ex(struct mac_async_descriptor *const descr, uint8_t mac[6])
164 {
165 	ASSERT(descr && mac);
166 
167 	return _mac_async_set_filter_ex(&descr->dev, mac);
168 }
169 
170 /**
171  * \brief Write PHY register
172  */
mac_async_write_phy_reg(struct mac_async_descriptor * const descr,uint16_t addr,uint16_t reg,uint16_t val)173 int32_t mac_async_write_phy_reg(struct mac_async_descriptor *const descr, uint16_t addr, uint16_t reg, uint16_t val)
174 {
175 	ASSERT(descr);
176 
177 	return _mac_async_write_phy_reg(&descr->dev, addr, reg, val);
178 }
179 /**
180  * \brief Read PHY register
181  */
mac_async_read_phy_reg(struct mac_async_descriptor * const descr,uint16_t addr,uint16_t reg,uint16_t * val)182 int32_t mac_async_read_phy_reg(struct mac_async_descriptor *const descr, uint16_t addr, uint16_t reg, uint16_t *val)
183 {
184 	ASSERT(descr && val);
185 
186 	return _mac_async_read_phy_reg(&descr->dev, addr, reg, val);
187 }
188 /**
189  * \brief Get MAC driver version
190  */
mac_async_get_version(void)191 uint32_t mac_async_get_version(void)
192 {
193 	return DRIVER_VERSION;
194 }
195 
196 /**
197  * \internal data receivced handler
198  *
199  * \param[in] dev The pointer to MAC device structure
200  */
mac_read_cb(struct _mac_async_device * dev)201 static void mac_read_cb(struct _mac_async_device *dev)
202 {
203 	struct mac_async_descriptor *const descr = CONTAINER_OF(dev, struct mac_async_descriptor, dev);
204 
205 	if (descr->cb.receive) {
206 		descr->cb.receive(descr);
207 	}
208 }
209 
210 /**
211  * \internal data transmit handler
212  *
213  * \param[in] dev The pointer to MAC device structure
214  */
mac_write_cb(struct _mac_async_device * dev)215 static void mac_write_cb(struct _mac_async_device *dev)
216 {
217 	struct mac_async_descriptor *const descr = CONTAINER_OF(dev, struct mac_async_descriptor, dev);
218 
219 	if (descr->cb.transmit) {
220 		descr->cb.transmit(descr);
221 	}
222 }
223