1 /* 2 * Copyright (c) 2006-2023, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Email Notes 8 * 2019-07-16 Kevin.Liu kevin.liu.mchp@gmail.com First Release 9 * 2023-09-16 luhuadong luhuadong@163.com fix uart config 10 */ 11 #ifndef __BOARD_H__ 12 #define __BOARD_H__ 13 14 #include "sam.h" 15 16 // <o> Internal SRAM memory size[Kbytes] <256-384> 17 // <i>Default: 384 18 #if defined(__SAME70J19B__) || defined(__ATSAME70J19B__) 19 #define SAME70_SRAM_SIZE 256 20 #elif defined(__SAME70J20B__) || defined(__ATSAME70J20B__) 21 #define SAME70_SRAM_SIZE 384 22 #elif defined(__SAME70J21B__) || defined(__ATSAME70J21B__) 23 #define SAME70_SRAM_SIZE 384 24 #elif defined(__SAME70N19B__) || defined(__ATSAME70N19B__) 25 #define SAME70_SRAM_SIZE 256 26 #elif defined(__SAME70N20B__) || defined(__ATSAME70N20B__) 27 #define SAME70_SRAM_SIZE 384 28 #elif defined(__SAME70N21B__) || defined(__ATSAME70N21B__) 29 #define SAME70_SRAM_SIZE 384 30 #elif defined(__SAME70Q19B__) || defined(__ATSAME70Q19B__) 31 #define SAME70_SRAM_SIZE 256 32 #elif defined(__SAME70Q20B__) || defined(__ATSAME70Q20B__) 33 #define SAME70_SRAM_SIZE 384 34 #elif defined(__SAME70Q21B__) || defined(__ATSAME70Q21B__) 35 #define SAME70_SRAM_SIZE 384 36 #elif defined(__SAMS70J19B__) || defined(__ATSAMS70J19B__) 37 #define SAME70_SRAM_SIZE 256 38 #elif defined(__SAMS70J20B__) || defined(__ATSAMS70J20B__) 39 #define SAME70_SRAM_SIZE 384 40 #elif defined(__SAMS70J21B__) || defined(__ATSAMS70J21B__) 41 #define SAME70_SRAM_SIZE 384 42 #elif defined(__SAMS70N19B__) || defined(__ATSAMS70N19B__) 43 #define SAME70_SRAM_SIZE 256 44 #elif defined(__SAMS70N20B__) || defined(__ATSAMS70N20B__) 45 #define SAME70_SRAM_SIZE 384 46 #elif defined(__SAMS70N21B__) || defined(__ATSAMS70N21B__) 47 #define SAME70_SRAM_SIZE 384 48 #elif defined(__SAMS70Q19B__) || defined(__ATSAMS70Q19B__) 49 #define SAME70_SRAM_SIZE 256 50 #elif defined(__SAMS70Q20B__) || defined(__ATSAMS70Q20B__) 51 #define SAME70_SRAM_SIZE 384 52 #elif defined(__SAMS70Q21B__) || defined(__ATSAMS70Q21B__) 53 #define SAME70_SRAM_SIZE 384 54 #elif defined(__SAMV70J19B__) || defined(__ATSAMV70J19B__) 55 #define SAME70_SRAM_SIZE 256 56 #elif defined(__SAMV70J20B__) || defined(__ATSAMV70J20B__) 57 #define SAME70_SRAM_SIZE 384 58 #elif defined(__SAMV70J21B__) || defined(__ATSAMV70J21B__) 59 #define SAME70_SRAM_SIZE 384 60 #elif defined(__SAMV70N19B__) || defined(__ATSAMV70N19B__) 61 #define SAME70_SRAM_SIZE 256 62 #elif defined(__SAMV70N20B__) || defined(__ATSAMV70N20B__) 63 #define SAME70_SRAM_SIZE 384 64 #elif defined(__SAMV70N21B__) || defined(__ATSAMV70N21B__) 65 #define SAME70_SRAM_SIZE 384 66 #elif defined(__SAMV70Q19B__) || defined(__ATSAMV70Q19B__) 67 #define SAME70_SRAM_SIZE 256 68 #elif defined(__SAMV70Q20B__) || defined(__ATSAMV70Q20B__) 69 #define SAME70_SRAM_SIZE 384 70 #elif defined(__SAMV70Q21B__) || defined(__ATSAMV70Q21B__) 71 #define SAME70_SRAM_SIZE 384 72 #elif defined(__SAMV71J19B__) || defined(__ATSAMV71J19B__) 73 #define SAME70_SRAM_SIZE 256 74 #elif defined(__SAMV71J20B__) || defined(__ATSAMV71J20B__) 75 #define SAME70_SRAM_SIZE 384 76 #elif defined(__SAMV71J21B__) || defined(__ATSAMV71J21B__) 77 #define SAME70_SRAM_SIZE 384 78 #elif defined(__SAMV71N19B__) || defined(__ATSAMV71N19B__) 79 #define SAME70_SRAM_SIZE 256 80 #elif defined(__SAMV71N20B__) || defined(__ATSAMV71N20B__) 81 #define SAME70_SRAM_SIZE 384 82 #elif defined(__SAMV71N21B__) || defined(__ATSAMV71N21B__) 83 #define SAME70_SRAM_SIZE 384 84 #elif defined(__SAMV71Q19B__) || defined(__ATSAMV71Q19B__) 85 #define SAME70_SRAM_SIZE 256 86 #elif defined(__SAMV71Q20B__) || defined(__ATSAMV71Q20B__) 87 #define SAME70_SRAM_SIZE 384 88 #elif defined(__SAMV71Q21B__) || defined(__ATSAMV71Q21B__) 89 #define SAME70_SRAM_SIZE 384 90 #else 91 #error Board does not support the specified device 92 #endif 93 94 #define SAME70_SRAM_END (0x20400000 + SAME70_SRAM_SIZE * 1024) 95 96 #if defined(__ARMCC_VERSION) 97 extern int Image$$RW_IRAM1$$ZI$$Limit; 98 #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) 99 #elif __ICCARM__ 100 #pragma section="HEAP" 101 #define HEAP_BEGIN (__segment_begin("HEAP")) 102 #define HEAP_END (__segment_end("HEAP")) 103 #else 104 extern int __bss_end; 105 #define HEAP_BEGIN (&__bss_end) 106 #define HEAP_END SAME70_SRAM_END 107 #endif 108 109 #ifdef RT_USING_SERIAL 110 #include "hpl_usart_config.h" 111 #define DEFAULT_USART_BAUD_RATE CONF_USART_1_BAUD 112 #endif 113 114 void rt_hw_board_init(void); 115 116 #endif 117 118