1 /** 2 * \file 3 * 4 * \brief Ethernet PHY functionality declaration. 5 * 6 * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. 7 * 8 * \asf_license_start 9 * 10 * \page License 11 * 12 * Subject to your compliance with these terms, you may use Microchip 13 * software and any derivatives exclusively with Microchip products. 14 * It is your responsibility to comply with third party license terms applicable 15 * to your use of third party software (including open source software) that 16 * may accompany Microchip software. 17 * 18 * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 * 30 * \asf_license_stop 31 * 32 */ 33 34 #ifndef ETHERNET_PHY_H_INCLUDED 35 #define ETHERNET_PHY_H_INCLUDED 36 37 #ifdef __cplusplus 38 extern "C" { 39 #endif 40 41 #include "compiler.h" 42 #include "hal_mac_async.h" 43 #include "ieee8023_mii_standard_register.h" 44 45 struct ethernet_phy_descriptor { 46 struct mac_async_descriptor *mac; /* MAC descriptor handler */ 47 uint16_t addr; /* PHY address, defined by IEEE802.3 48 section 22.2.4.5.5 */ 49 }; 50 51 /** 52 * \brief Perform a HW initialization to the PHY 53 * 54 * This should be called only once to initialize the PHY pre-settings. 55 * 56 * \param[in] descr Ethernet PHY descriptor. 57 * \param[in] mac MAC descriptor, the descriptor should be initialized. 58 * \param[in] addr Ethernet PHY 5 bits address. 59 * 60 * \return Operation result 61 * \retval ERR_NONE initializing successful. 62 */ 63 int32_t ethernet_phy_init(struct ethernet_phy_descriptor *const descr, struct mac_async_descriptor *const mac, 64 uint16_t addr); 65 66 /** 67 * \brief Set PHY address 68 * 69 * Set PHY management PHY address which defined by IEEE802.3 section 22.2.4.5.5 70 * 71 * \param[in] descr Ethernet PHY descriptor. 72 * \param[in] addr PHY address 73 * 74 * \return Operation result 75 * \retval ERR_NONE Set address successful. 76 */ 77 int32_t ethernet_phy_set_address(struct ethernet_phy_descriptor *const descr, uint16_t addr); 78 79 /** 80 * \brief Read PHY Register value. 81 * 82 * Read PHY Register value from PHY. 83 * 84 * \note For conformance with the 802.3 specification, MDC must not exceed 85 * 2.5 MHz (MDC is only active during MDIO read and write operations). 86 * The function execution time depend on MDC frequency. 87 * 88 * \param[in] descr Ethernet PHY descriptor. 89 * \param[in] reg Register address 90 * \param[out] val Register value 91 * 92 * \return Operation result. 93 * \retval ERR_NONE Read register successful. 94 */ 95 int32_t ethernet_phy_read_reg(struct ethernet_phy_descriptor *const descr, uint16_t reg, uint16_t *val); 96 97 /** 98 * \brief Write PHY Register value. 99 * 100 * Read PHY Register value from PHY. 101 * 102 * \note For conformance with the 802.3 specification, MDC must not exceed 103 * 2.5 MHz (MDC is only active during MDIO read and write operations). 104 * The function execution time depend on MDC frequency. 105 * 106 * \param[in] descr Ethernet PHY descriptor. 107 * \param[in] reg Register address 108 * \param[out] val Register value 109 * 110 * \return Operation result. 111 * \retval ERR_NONE Write register successful. 112 */ 113 int32_t ethernet_phy_write_reg(struct ethernet_phy_descriptor *const descr, uint16_t reg, uint16_t val); 114 115 /** 116 * \brief Setting bit for a PHY Register 117 * 118 * Bit setting for a PHY Register. 119 * 120 * \param[in] descr Ethernet PHY descriptor. 121 * \param[in] reg Register address. 122 * \param[in] ofst Register bit mask. 123 * 124 * \return Operation result. 125 * \retval ERR_NONE Set register bit successful. 126 */ 127 int32_t ethernet_phy_set_reg_bit(struct ethernet_phy_descriptor *const descr, uint16_t reg, uint16_t ofst); 128 129 /** 130 * \brief Clear bit for a PHY Register 131 * 132 * Clear bit for a PHY Register. 133 * 134 * \param[in] descr Ethernet PHY descriptor. 135 * \param[in] reg Register address. 136 * \param[in] ofst Register bit mask. 137 * 138 * \return Operation result. 139 * \retval ERR_NONE Clear register bit successful. 140 */ 141 int32_t ethernet_phy_clear_reg_bit(struct ethernet_phy_descriptor *const descr, uint16_t reg, uint16_t ofst); 142 143 /** 144 * \brief Set PHY low-power consumption state. 145 * 146 * The specific behavior of a PHY in the power-down state is implementation 147 * specific. While in the power-down state, the PHY shall respond to management 148 * transactions. During the transition to the power-down state and while in the 149 * power-down state, the PHY shall not generate spurious signals on the MII or 150 * GMII. 151 * 152 * \param[in] descr Ethernet PHY descriptor. 153 * \param[in] state The state of the power-down mode. 154 * 155 * \return Operation result. 156 * \retval ERR_NONE Power-Down has been config successful. 157 */ 158 int32_t ethernet_phy_set_powerdown(struct ethernet_phy_descriptor *const descr, bool state); 159 160 /** 161 * \brief Set PHY electrically isolate state. 162 * 163 * When the PHY is isolated from the MII or RMII it shall not respond to the 164 * data bundle. 165 * 166 * \param[in] descr Ethernet PHY descriptor. 167 * \param[in] state The state of the isolate mode. 168 * 169 * \return Operation result. 170 * \retval ERR_NONE Isolate has been config successful. 171 */ 172 int32_t ethernet_phy_set_isolate(struct ethernet_phy_descriptor *const descr, bool state); 173 174 /** 175 * \brief Restart an auto negotiation of the PHY. 176 * 177 * Restart Auto_Negotantion process 178 * 179 * \param[in] descr Ethernet PHY descriptor. 180 * 181 * \return Operation result 182 * \retval ERR_NONE Auto-Negotiation has been initiated. 183 */ 184 int32_t ethernet_phy_restart_autoneg(struct ethernet_phy_descriptor *const descr); 185 186 /** 187 * \brief Set PHY placed in a loopback mode of operation. 188 * 189 * When in loopback mode, the PHY shall accept data from the MII/RMII transmit 190 * data path and return it to the MII/RMII receive data path. 191 * 192 * \param[in] descr Ethernet PHY descriptor. 193 * \param[in] state State of the loopback mode. 194 * 195 * \return Operation result 196 * \retval ERR_NONE Loopback has been set successful. 197 */ 198 int32_t ethernet_phy_set_loopback(struct ethernet_phy_descriptor *const descr, bool state); 199 200 /** 201 * \brief Get PHY link status 202 * 203 * Get PHY link status 204 * 205 * \param[in] descr Ethernet PHY descriptor. 206 * \param[out] status Pointer to the Link Status. 207 * 208 * \return ERR_NONE if successfully 209 */ 210 int32_t ethernet_phy_get_link_status(struct ethernet_phy_descriptor *const descr, bool *status); 211 212 /** 213 * \brief Reset PHY. 214 * 215 * Resetting PHY, this action set all the status and control register to their 216 * default states. As a consequence this action may change the internal state 217 * of the PHY and the state of the physical link associated with the PHY. The 218 * reset process shall be completed within 0.5 second. 219 * 220 * \param[in] descr Ethernet PHY descriptor. 221 * 222 * \return ERR_NONE if successfully 223 */ 224 int32_t ethernet_phy_reset(struct ethernet_phy_descriptor *const descr); 225 226 #ifdef __cplusplus 227 } 228 #endif 229 230 #endif /* #ifndef ETHERNET_PHY_H_INCLUDED */ 231