1 /* 2 * Copyright (c) 2006-2023, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Email Notes 8 * 2019-07-16 Kevin.Liu kevin.liu.mchp@gmail.com First Release 9 * 2023-09-16 luhuadong luhuadong@163.com fix uart config 10 */ 11 #ifndef __BOARD_H__ 12 #define __BOARD_H__ 13 14 // <o> Internal SRAM memory size[Kbytes] <4-16> 15 // <i>Default: 16 16 #if defined(__SAML10E14A__) || defined(__ATSAML10E14A__) 17 #define SAML10_SRAM_SIZE 4 18 #elif defined(__SAML10E15A__) || defined(__ATSAML10E15A__) 19 #define SAML10_SRAM_SIZE 8 20 #elif defined(__SAML10E16A__) || defined(__ATSAML10E16A__) 21 #define SAML10_SRAM_SIZE 16 22 #elif defined(__SAML10D14A__) || defined(__ATSAML10D14A__) 23 #define SAML10_SRAM_SIZE 4 24 #elif defined(__SAML10D15A__) || defined(__ATSAML10D15A__) 25 #define SAML10_SRAM_SIZE 8 26 #elif defined(__SAML10D16A__) || defined(__ATSAML10D16A__) 27 #define SAML10_SRAM_SIZE 16 28 #else 29 #error Board does not support the specified device. 30 #endif 31 32 #define SAML10_SRAM_END (0x20000000 + SAML10_SRAM_SIZE * 1024) 33 34 #if defined(__ARMCC_VERSION) 35 extern int Image$$RW_IRAM1$$ZI$$Limit; 36 #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) 37 #elif __ICCARM__ 38 #pragma section="HEAP" 39 #define HEAP_BEGIN (__segment_begin("HEAP")) 40 #define HEAP_END (__segment_end("HEAP")) 41 #else 42 extern int __bss_end; 43 #define HEAP_BEGIN (&__bss_end) 44 #define HEAP_END SAML10_SRAM_END 45 #endif 46 47 #ifdef RT_USING_SERIAL 48 #include "hpl_sercom_config.h" 49 #define DEFAULT_USART_BAUD_RATE CONF_SERCOM_2_USART_BAUD 50 #endif 51 52 void rt_hw_board_init(void); 53 54 #endif 55 56