1 /*
2  * Copyright (c) 2006-2019, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2019-12-04     Jiaxun Yang  Initial version
9  */
10 
11 /**
12  * @addtogroup mipssim
13  */
14 
15 /*@{*/
16 
17 #include <rtthread.h>
18 #include <rthw.h>
19 
20 #include "mips_regs.h"
21 #include "exception.h"
22 #include "drv_uart.h"
23 
24 #define CPU_HZ	(100 * 1000 * 1000)
25 #define RT_HW_HEAP_END	(0x80000000 + 64 * 1024 * 1024)
26 
27 extern unsigned char __bss_end;
28 
29 /**
30  * This is the timer interrupt service routine.
31  */
rt_hw_timer_handler(void)32 void rt_hw_timer_handler(void)
33 {
34     unsigned int count;
35 
36     count = read_c0_compare();
37     write_c0_compare(count);
38     write_c0_count(0);
39     /* increase a OS tick */
40     rt_tick_increase();
41 }
42 
43 /**
44  * This function will initial OS timer
45  */
rt_hw_timer_init(void)46 void rt_hw_timer_init(void)
47 {
48     write_c0_compare(CPU_HZ/2/RT_TICK_PER_SECOND);
49     write_c0_count(0);
50     mips_unmask_cpu_irq(7);
51 }
52 
53 /**
54  * Board level initialization
55  */
rt_hw_board_init(void)56 void rt_hw_board_init(void)
57 {
58     rt_hw_exception_init();
59 
60     /* init hardware interrupt */
61     rt_hw_interrupt_init();
62 
63     #ifdef RT_USING_FPU
64     /* init hardware fpu */
65     rt_hw_fpu_init();
66     #endif
67 
68 #ifdef RT_USING_SERIAL
69     /* init hardware UART device */
70     rt_hw_uart_init();
71     /* set console device */
72     rt_console_set_device("uart");
73 #endif
74 
75 #ifdef RT_USING_HEAP
76     rt_system_heap_init((void*)&__bss_end, (void*)RT_HW_HEAP_END);
77 #endif
78 
79     /* init operating system timer */
80     rt_hw_timer_init();
81 
82 
83 #ifdef RT_USING_COMPONENTS_INIT
84     rt_components_board_init();
85 #endif
86 
87     rt_kprintf("Current SR: 0x%08x\n", read_c0_status());
88 
89 }
90 
91 /*@}*/
92