1 /** 2 ****************************************************************************** 3 * @file HAL_adc.h 4 * @author AE Team 5 * @version V1.1.0 6 * @date 28/08/2019 7 * @brief This file contains all the functions prototypes for the ADC firmware 8 * library. 9 ****************************************************************************** 10 * @copy 11 * 12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 * TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY 15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 * 19 * <h2><center>© COPYRIGHT 2019 MindMotion</center></h2> 20 */ 21 22 /* Define to prevent recursive inclusion -------------------------------------*/ 23 #ifndef __HAL_ADC_H 24 #define __HAL_ADC_H 25 26 /* Includes ------------------------------------------------------------------*/ 27 #include "HAL_device.h" 28 29 /** @addtogroup StdPeriph_Driver 30 * @{ 31 */ 32 33 /** @addtogroup ADC 34 * @{ 35 */ 36 37 /** @defgroup ADC_Exported_Types 38 * @{ 39 */ 40 41 /** 42 * @brief ADC Init structure definition 43 */ 44 45 /* 46 typedef struct 47 { 48 uint32_t ADC_Mode; 49 FunctionalState ADC_ScanConvMode; 50 FunctionalState ADC_ContinuousConvMode; 51 uint32_t ADC_ExternalTrigConv; 52 uint32_t ADC_DataAlign; 53 uint8_t ADC_NbrOfChannel; 54 }ADC_InitTypeDef; 55 */ 56 typedef struct 57 { 58 uint32_t ADC_Resolution; 59 uint32_t ADC_PRESCARE; 60 uint32_t ADC_Mode; 61 FunctionalState ADC_ContinuousConvMode; 62 uint32_t ADC_ExternalTrigConv; 63 uint32_t ADC_DataAlign; 64 } ADC_InitTypeDef; 65 /** 66 * @} 67 */ 68 69 /** @defgroup ADC_Exported_Constants 70 * @{ 71 */ 72 73 #define IS_ADC_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \ 74 ((*(uint32_t*)&(PERIPH)) == ADC2_BASE)) 75 76 #define IS_ADC_DMA_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \ 77 ((*(uint32_t*)&(PERIPH)) == ADC2_BASE)) 78 79 /** @defgroup ADC_Resolution 80 * @{ 81 */ 82 #define ADC_Resolution_12b ((uint32_t)0x00000000) 83 #define ADC_Resolution_11b ((uint32_t)0x00000080) 84 #define ADC_Resolution_10b ((uint32_t)0x00000100) 85 #define ADC_Resolution_9b ((uint32_t)0x00000180) 86 #define ADC_Resolution_8b ((uint32_t)0x00000200) 87 /** 88 * @brief for ADC1, ADC2 89 */ 90 91 #define ADC_PCLK2_PRESCARE_2 ((uint32_t)0x00000000) 92 #define ADC_PCLK2_PRESCARE_4 ((uint32_t)0x00000010) 93 #define ADC_PCLK2_PRESCARE_6 ((uint32_t)0x00000020) 94 #define ADC_PCLK2_PRESCARE_8 ((uint32_t)0x00000030) 95 #define ADC_PCLK2_PRESCARE_10 ((uint32_t)0x00000040) 96 #define ADC_PCLK2_PRESCARE_12 ((uint32_t)0x00000050) 97 #define ADC_PCLK2_PRESCARE_14 ((uint32_t)0x00000060) 98 #define ADC_PCLK2_PRESCARE_16 ((uint32_t)0x00000070) 99 100 101 /** @defgroup ADC_dual_mode 102 * @{ 103 */ 104 105 #define ADC_Mode_Single ((uint32_t)0x00000000) 106 #define ADC_Mode_Single_Period ((uint32_t)0x00000200) 107 #define ADC_Mode_Continuous_Scan ((uint32_t)0x00000400) 108 109 110 #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Single) || \ 111 ((MODE) == ADC_Mode_Single_Period) || \ 112 ((MODE) == ADC_Mode_Continuous_Scan)) 113 /** 114 * @} 115 */ 116 117 118 119 /** @defgroup ADC_extrenal_trigger_sources_for_regular_channels_conversion 120 * @{ 121 */ 122 123 /** 124 * @brief for ADC1 125 */ 126 127 #define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) 128 #define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00000010) 129 #define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00000020) 130 #define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00000030) 131 #define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00000040) 132 #define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x00000050) 133 #define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000060) 134 #define ADC_ExternalTrigConv_EXTI_11 ((uint32_t)0x00000070) 135 136 /** 137 * @brief for ADC2 138 */ 139 140 #define ADC_ExternalTrigConv_T1_TRGO ((uint32_t)0x00000000) 141 #define ADC_ExternalTrigConv_T1_CC4 ((uint32_t)0x00000010) 142 #define ADC_ExternalTrigConv_T2_TRGO ((uint32_t)0x00000020) 143 #define ADC_ExternalTrigConv_T2_CC1 ((uint32_t)0x00000030) 144 #define ADC_ExternalTrigConv_T3_CC4 ((uint32_t)0x00000040) 145 #define ADC_ExternalTrigConv_T4_TRGO ((uint32_t)0x00000050) 146 #define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000060) 147 #define ADC_ExternalTrigConv_EXTI_15 ((uint32_t)0x00000070) 148 149 150 151 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \ 152 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \ 153 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \ 154 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \ 155 ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \ 156 ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \ 157 ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \ 158 ((REGTRIG) == ADC_ExternalTrigConv_EXTI_11) || \ 159 ((REGTRIG) == ADC_ExternalTrigConv_T1_TRGO) || \ 160 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC4) || \ 161 ((REGTRIG) == ADC_ExternalTrigConv_T2_TRGO) || \ 162 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC1) || \ 163 ((REGTRIG) == ADC_ExternalTrigConv_T3_CC4) || \ 164 ((REGTRIG) == ADC_ExternalTrigConv_T4_TRGO) || \ 165 ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \ 166 ((REGTRIG) == ADC_ExternalTrigConv_EXTI_15)) 167 /** 168 * @} 169 */ 170 171 /** @defgroup ADC_data_align 172 * @{ 173 */ 174 175 #define ADC_DataAlign_Right ((uint32_t)0x00000000) 176 #define ADC_DataAlign_Left ((uint32_t)0x00000800) 177 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \ 178 ((ALIGN) == ADC_DataAlign_Left)) 179 /** 180 * @} 181 */ 182 183 /** @defgroup ADC_channels 184 * @{ 185 */ 186 187 #define ADC_Channel_0 ((uint8_t)0x00) 188 #define ADC_Channel_1 ((uint8_t)0x01) 189 #define ADC_Channel_2 ((uint8_t)0x02) 190 #define ADC_Channel_3 ((uint8_t)0x03) 191 #define ADC_Channel_4 ((uint8_t)0x04) 192 #define ADC_Channel_5 ((uint8_t)0x05) 193 #define ADC_Channel_6 ((uint8_t)0x06) 194 #define ADC_Channel_7 ((uint8_t)0x07) 195 #define ADC_Channel_8 ((uint8_t)0x08) 196 #define ADC_Channel_All ((uint8_t)0x0f) 197 198 199 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \ 200 ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \ 201 ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \ 202 ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \ 203 ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_All)) 204 /** 205 * @} 206 */ 207 208 #define ADC_SMPR_SMP ((uint32_t)0x00000007) /*!< SMP[2:0] bits (Sampling time selection) */ 209 #define ADC_SMPR_SMP_0 ((uint32_t)0x00000001) /*!< Bit 0 */ 210 #define ADC_SMPR_SMP_1 ((uint32_t)0x00000002) /*!< Bit 1 */ 211 #define ADC_SMPR_SMP_2 ((uint32_t)0x00000004) /*!< Bit 2 */ 212 /** @defgroup ADC_sampling_times 213 * @{ 214 */ 215 216 #define ADC_SampleTime_1_5Cycles ((uint32_t)0x00000000) 217 #define ADC_SampleTime_7_5Cycles ((uint32_t)0x00000001) 218 #define ADC_SampleTime_13_5Cycles ((uint32_t)0x00000002) 219 #define ADC_SampleTime_28_5Cycles ((uint32_t)0x00000003) 220 #define ADC_SampleTime_41_5Cycles ((uint32_t)0x00000004) 221 #define ADC_SampleTime_55_5Cycles ((uint32_t)0x00000005) 222 #define ADC_SampleTime_71_5Cycles ((uint32_t)0x00000006) 223 #define ADC_SampleTime_239_5Cycles ((uint32_t)0x00000007) 224 225 /** @defgroup ADC_injected_channel_selection 226 * @{ 227 */ 228 229 #define ADC_InjectedChannel_0 ((uint8_t)0x18) 230 #define ADC_InjectedChannel_1 ((uint8_t)0x1C) 231 #define ADC_InjectedChannel_2 ((uint8_t)0x20) 232 #define ADC_InjectedChannel_3 ((uint8_t)0x24) 233 #define ADC_InjectedChannel_4 ((uint8_t)0x28) 234 #define ADC_InjectedChannel_5 ((uint8_t)0x2C) 235 #define ADC_InjectedChannel_6 ((uint8_t)0x30) 236 #define ADC_InjectedChannel_7 ((uint8_t)0x34) 237 #define ADC_InjectedChannel_8 ((uint8_t)0x38) 238 #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \ 239 ((CHANNEL) == ADC_InjectedChannel_2) || \ 240 ((CHANNEL) == ADC_InjectedChannel_3) || \ 241 ((CHANNEL) == ADC_InjectedChannel_4) || \ 242 ((CHANNEL) == ADC_InjectedChannel_5) || \ 243 ((CHANNEL) == ADC_InjectedChannel_6) || \ 244 ((CHANNEL) == ADC_InjectedChannel_7) || \ 245 ((CHANNEL) == ADC_InjectedChannel_8)) 246 /** 247 * @} 248 */ 249 250 /** @defgroup ADC_analog_watchdog_selection 251 * @{ 252 */ 253 254 #define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00000002) 255 #define ADC_AnalogWatchdog_None ((uint32_t)0x00000000) 256 257 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \ 258 ((WATCHDOG) == ADC_AnalogWatchdog_None)) 259 /** 260 * @} 261 */ 262 263 /** @defgroup ADC_interrupts_definition 264 * @{ 265 */ 266 267 #define ADC_IT_EOC ((uint16_t)0x0001) 268 #define ADC_IT_AWD ((uint16_t)0x0002) 269 270 #define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xFFFC) == 0x00) && ((IT) != 0x00)) 271 272 #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD)) 273 274 /** 275 * @} 276 */ 277 278 /** @defgroup ADC_flags_definition 279 * @{ 280 */ 281 282 #define ADC_FLAG_AWD ((uint8_t)0x02) 283 #define ADC_FLAG_EOC ((uint8_t)0x01) 284 #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xF0) == 0x00) && ((FLAG) != 0x00)) 285 #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC)) 286 287 /** 288 * @} 289 */ 290 291 /** @defgroup ADC_thresholds 292 * @{ 293 */ 294 295 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF) 296 297 /** 298 * @} 299 */ 300 301 /** @defgroup ADC_injected_offset 302 * @{ 303 */ 304 305 #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF) 306 307 /** 308 * @} 309 */ 310 311 /** @defgroup ADC_injected_length 312 * @{ 313 */ 314 315 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4)) 316 317 /** 318 * @} 319 */ 320 321 /** @defgroup ADC_injected_rank 322 * @{ 323 */ 324 325 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4)) 326 327 /** 328 * @} 329 */ 330 331 332 /** @defgroup ADC_regular_length 333 * @{ 334 */ 335 336 #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10)) 337 /** 338 * @} 339 */ 340 341 /** @defgroup ADC_regular_rank 342 * @{ 343 */ 344 345 #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10)) 346 347 /** 348 * @} 349 */ 350 351 /** @defgroup ADC_regular_discontinuous_mode_number 352 * @{ 353 */ 354 355 #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8)) 356 357 /** 358 * @} 359 */ 360 361 /** 362 * @} 363 */ 364 365 /** @defgroup ADC_Exported_Macros 366 * @{ 367 */ 368 369 /** 370 * @} 371 */ 372 373 /** @defgroup ADC_Exported_Functions 374 * @{ 375 */ 376 377 void ADC_DeInit(ADC_TypeDef* ADCx); 378 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct); 379 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct); 380 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState); 381 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState); 382 void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState); 383 void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 384 FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx); 385 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); 386 void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 387 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx); 388 389 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog); 390 void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold); 391 void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel); 392 void ADC_TempSensorVrefintCmd(FunctionalState NewState); 393 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); 394 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); 395 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT); 396 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT); 397 398 #endif /*__HAL_ADC_H */ 399 400 /** 401 * @} 402 */ 403 404 /** 405 * @} 406 */ 407 408 /** 409 * @} 410 */ 411 412 /*-------------------------(C) COPYRIGHT 2019 MindMotion ----------------------*/ 413