1 /** 2 ****************************************************************************** 3 * @file HAL_wwdg.c 4 * @author AE Team 5 * @version V1.1.0 6 * @date 28/08/2019 7 * @brief This file provides all the WWDG firmware functions. 8 ****************************************************************************** 9 * @copy 10 * 11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 * TIME. AS A RESULT,MindMotion SHALL NOT BE HELD LIABLE FOR ANY 14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 * 18 * <h2><center>© COPYRIGHT 2019 MindMotion</center></h2> 19 */ 20 21 /* Includes ------------------------------------------------------------------*/ 22 #include "HAL_wwdg.h" 23 #include "HAL_rcc.h" 24 25 /** @addtogroup StdPeriph_Driver 26 * @{ 27 */ 28 29 /** @defgroup WWDG 30 * @brief WWDG driver modules 31 * @{ 32 */ 33 34 /** @defgroup WWDG_Private_TypesDefinitions 35 * @{ 36 */ 37 38 /** 39 * @} 40 */ 41 42 /** @defgroup WWDG_Private_Defines 43 * @{ 44 */ 45 46 /* ----------- WWDG registers bit address in the alias region ----------- */ 47 #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE) 48 49 /* Alias word address of EWI bit */ 50 #define CFR_OFFSET (WWDG_OFFSET + 0x04) 51 #define EWI_BitNumber 0x09 52 #define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4)) 53 54 /* --------------------- WWDG registers bit mask ------------------------ */ 55 56 /* CR register bit mask */ 57 #define CR_WDGA_Set ((uint32_t)0x00000080) 58 59 /* CFR register bit mask */ 60 #define CFR_WDGTB_Mask ((uint32_t)0xFFFFFE7F) 61 #define CFR_W_Mask ((uint32_t)0xFFFFFF80) 62 #define BIT_Mask ((uint8_t)0x7F) 63 64 /** 65 * @} 66 */ 67 68 /** @defgroup WWDG_Private_Macros 69 * @{ 70 */ 71 72 /** 73 * @} 74 */ 75 76 /** @defgroup WWDG_Private_Variables 77 * @{ 78 */ 79 80 /** 81 * @} 82 */ 83 84 /** @defgroup WWDG_Private_FunctionPrototypes 85 * @{ 86 */ 87 88 /** 89 * @} 90 */ 91 92 /** @defgroup WWDG_Private_Functions 93 * @{ 94 */ 95 96 /** 97 * @brief Deinitializes the WWDG peripheral registers to their default 98 * reset values. 99 * @param None 100 * @retval : None 101 */ WWDG_DeInit(void)102void WWDG_DeInit(void) 103 { 104 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); 105 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); 106 } 107 108 /** 109 * @brief Sets the WWDG Prescaler. 110 * @param WWDG_Prescaler: specifies the WWDG Prescaler. 111 * This parameter can be one of the following values: 112 * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1 113 * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2 114 * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4 115 * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8 116 * @retval : None 117 */ WWDG_SetPrescaler(uint32_t WWDG_Prescaler)118void WWDG_SetPrescaler(uint32_t WWDG_Prescaler) 119 { 120 uint32_t tmpreg = 0; 121 /* Check the parameters */ 122 assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler)); 123 /* Clear WDGTB[1:0] bits */ 124 tmpreg = WWDG->CFR & CFR_WDGTB_Mask; 125 /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */ 126 tmpreg |= WWDG_Prescaler; 127 /* Store the new value */ 128 WWDG->CFR = tmpreg; 129 } 130 131 /** 132 * @brief Sets the WWDG window value. 133 * @param WindowValue: specifies the window value to be compared to 134 * the downcounter. 135 * This parameter value must be lower than 0x80. 136 * @retval : None 137 */ WWDG_SetWindowValue(uint8_t WindowValue)138void WWDG_SetWindowValue(uint8_t WindowValue) 139 { 140 uint32_t tmpreg = 0; 141 /* Check the parameters */ 142 assert_param(IS_WWDG_WINDOW_VALUE(WindowValue)); 143 /* Clear W[6:0] bits */ 144 tmpreg = WWDG->CFR & CFR_W_Mask; 145 /* Set W[6:0] bits according to WindowValue value */ 146 tmpreg |= WindowValue & BIT_Mask; 147 /* Store the new value */ 148 WWDG->CFR = tmpreg; 149 } 150 151 /** 152 * @brief Enables the WWDG Early Wakeup interrupt(EWI). 153 * @param None 154 * @retval : None 155 */ WWDG_EnableIT(void)156void WWDG_EnableIT(void) 157 { 158 WWDG->CFR |= (uint32_t)0x200; 159 } 160 161 /** 162 * @brief Sets the WWDG counter value. 163 * @param Counter: specifies the watchdog counter value. 164 * This parameter must be a number between 0x40 and 0x7F. 165 * @retval : None 166 */ WWDG_SetCounter(uint8_t Counter)167void WWDG_SetCounter(uint8_t Counter) 168 { 169 /* Check the parameters */ 170 assert_param(IS_WWDG_COUNTER(Counter)); 171 /* Write to T[6:0] bits to configure the counter value, no need to do 172 a read-modify-write; writing a 0 to WDGA bit does nothing */ 173 WWDG->CR = Counter & BIT_Mask; 174 } 175 176 /** 177 * @brief Enables WWDG and load the counter value. 178 * @param Counter: specifies the watchdog counter value. 179 * This parameter must be a number between 0x40 and 0x7F. 180 * @retval : None 181 */ WWDG_Enable(uint8_t Counter)182void WWDG_Enable(uint8_t Counter) 183 { 184 /* Check the parameters */ 185 assert_param(IS_WWDG_COUNTER(Counter)); 186 WWDG->CR = CR_WDGA_Set | Counter; 187 } 188 189 /** 190 * @brief Checks whether the Early Wakeup interrupt flag is set or not. 191 * @param None 192 * @retval : The new state of the Early Wakeup interrupt flag (SET or RESET) 193 */ WWDG_GetFlagStatus(void)194FlagStatus WWDG_GetFlagStatus(void) 195 { 196 return (FlagStatus)(WWDG->SR); 197 } 198 199 /** 200 * @brief Clears Early Wakeup interrupt flag. 201 * @param None 202 * @retval : None 203 */ WWDG_ClearFlag(void)204void WWDG_ClearFlag(void) 205 { 206 WWDG->SR = (uint32_t)RESET; 207 } 208 209 /** 210 * @} 211 */ 212 213 /** 214 * @} 215 */ 216 217 /** 218 * @} 219 */ 220 221 /*-------------------------(C) COPYRIGHT 2019 MindMotion ----------------------*/ 222