1 //////////////////////////////////////////////////////////////////////////////// 2 /// @file hal_fsmc.h 3 /// @author AE TEAM 4 /// @brief THIS FILE CONTAINS ALL THE FUNCTIONS PROTOTYPES FOR THE SDIO 5 /// FIRMWARE LIBRARY. 6 //////////////////////////////////////////////////////////////////////////////// 7 /// @attention 8 /// 9 /// THE EXISTING FIRMWARE IS ONLY FOR REFERENCE, WHICH IS DESIGNED TO PROVIDE 10 /// CUSTOMERS WITH CODING INFORMATION ABOUT THEIR PRODUCTS SO THEY CAN SAVE 11 /// TIME. THEREFORE, MINDMOTION SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT OR 12 /// CONSEQUENTIAL DAMAGES ABOUT ANY CLAIMS ARISING OUT OF THE CONTENT OF SUCH 13 /// HARDWARE AND/OR THE USE OF THE CODING INFORMATION CONTAINED HEREIN IN 14 /// CONNECTION WITH PRODUCTS MADE BY CUSTOMERS. 15 /// 16 /// <H2><CENTER>© COPYRIGHT MINDMOTION </CENTER></H2> 17 //////////////////////////////////////////////////////////////////////////////// 18 19 // Define to prevent recursive inclusion 20 #ifndef __HAL_FSMC_H 21 #define __HAL_FSMC_H 22 23 // Files includes 24 #include "types.h" 25 #include "reg_common.h" 26 #include "reg_fsmc.h" 27 28 //////////////////////////////////////////////////////////////////////////////// 29 /// @addtogroup MM32_Hardware_Abstract_Layer 30 /// @{ 31 32 //////////////////////////////////////////////////////////////////////////////// 33 /// @defgroup FSMC_HAL 34 /// @brief FSMC HAL modules 35 /// @{ 36 37 //////////////////////////////////////////////////////////////////////////////// 38 /// @defgroup FSMC_Exported_Types 39 /// @{ 40 41 //////////////////////////////////////////////////////////////////////////////// 42 /// @brief FSMC_interrupts_define 43 //////////////////////////////////////////////////////////////////////////////// 44 45 46 47 48 49 // Timing parameter configuration register set selection register set0 register set1 register set2 50 51 #define FSMC_TimingRegSelect_0 ((u32)0x00000000) 52 #define FSMC_TimingRegSelect_1 ((u32)0x00000100) 53 #define FSMC_TimingRegSelect_2 ((u32)0x00000200) 54 55 // Capacity of external device 56 #define FSMC_MemSize_None ((u32)0x00000000) 57 #define FSMC_MemSize_64KB ((u32)0x00000001) 58 #define FSMC_MemSize_128KB ((u32)0x00000002) 59 #define FSMC_MemSize_256KB ((u32)0x00000002) 60 #define FSMC_MemSize_512KB ((u32)0x00000004) 61 #define FSMC_MemSize_1MB ((u32)0x00000005) 62 #define FSMC_MemSize_2MB ((u32)0x00000006) 63 #define FSMC_MemSize_4MB ((u32)0x00000007) 64 #define FSMC_MemSize_8MB ((u32)0x00000008) 65 #define FSMC_MemSize_16MB ((u32)0x00000009) 66 #define FSMC_MemSize_32MB ((u32)0x0000000A) 67 #define FSMC_MemSize_64MB ((u32)0x0000000B) 68 #define FSMC_MemSize_128MB ((u32)0x0000000C) 69 #define FSMC_MemSize_256MB ((u32)0x0000000D) 70 #define FSMC_MemSize_512MB ((u32)0x0000000E) 71 #define FSMC_MemSize_1GB ((u32)0x0000000F) 72 #define FSMC_MemSize_2GB ((u32)0x00000010) 73 #define FSMC_MemSize_4GB ((u32)0x00000011) 74 75 76 // Memory data bus bit width setting 77 typedef enum { 78 FSMC_DataWidth_16bits = (0x0000), //16bits 79 FSMC_DataWidth_32bits = (0x0001), //32bits 80 FSMC_DataWidth_64bits = (0x0002), //64bits 81 FSMC_DataWidth_128bits = (0x0003), //128bits 82 FSMC_DataWidth_8bits = (0x0004), //8bits 83 } FSMC_NORSRAM_DataWidth_TypeDef; 84 85 typedef enum { 86 FSMC_NORSRAM_BANK0 = 0, 87 FSMC_NORSRAM_BANK1 = 1, 88 FSMC_NORSRAM_BANK2 = 2, 89 } FSMC_NORSRAM_BANK_TypeDef; 90 91 typedef struct { 92 u32 FSMC_SMReadPipe; //sm_read_pipe[1:0] The cycle of latching read data, that is, the cycle when ready_resp is pulled high 93 94 u32 FSMC_ReadyMode; //Select whether the hready_resp signal comes from the FSMC IP internal or external DEVICE, only for writing and reading external DEVICE operations. 95 //0: Internal FSMC 1: External DEVICE (ie from FSMC_NWAIT) 96 u32 FSMC_WritePeriod; //Write cycle 97 98 u32 FSMC_WriteHoldTime; //Address/data hold time during write operation 99 100 u32 FSMC_AddrSetTime; //Address establishment time 101 102 u32 FSMC_ReadPeriod; //Read cycle 103 104 FSMC_NORSRAM_DataWidth_TypeDef FSMC_DataWidth; 105 106 } FSMC_NORSRAM_Bank_InitTypeDef; 107 108 typedef struct { 109 u32 FSMC_Mode; 110 u32 FSMC_TimingRegSelect; 111 u32 FSMC_MemSize; 112 u32 FSMC_MemType; 113 u32 FSMC_AddrDataMode; 114 } FSMC_InitTypeDef; 115 116 117 #define FSMC_MemType_SDRAM ((u32)0x0<<5) 118 #define FSMC_MemType_NorSRAM ((u32)0x1<<5) 119 #define FSMC_MemType_FLASH ((u32)0x2<<5) 120 #define FSMC_MemType_RESERVED ((u32)0x3<<5) 121 //SYSCFG_CFGR1 122 #define FSMC_Mode_6800 ((u32)0x40000000) 123 #define FSMC_Mode_8080 ((u32)0x20000000) 124 #define FSMC_Mode_NorFlash ((u32)0x00000000) 125 126 #define FSMC_AddrDataMUX ((u32)0x00000000) 127 #define FSMC_AddrDataDeMUX ((u32)0x10000000) 128 129 130 131 132 void FSMC_NORSRAMStructInit(FSMC_InitTypeDef* init_struct); 133 void FSMC_NORSRAM_BankStructInit(FSMC_NORSRAM_Bank_InitTypeDef* init_struct); 134 void FSMC_NORSRAMInit(FSMC_InitTypeDef* init_struct); 135 void FSMC_NORSRAM_Bank_Init(FSMC_NORSRAM_Bank_InitTypeDef* FSMC_Bank_InitStruct, FSMC_NORSRAM_BANK_TypeDef bank); 136 137 138 139 /// @} 140 141 /// @} 142 143 /// @} 144 145 //////////////////////////////////////////////////////////////////////////////// 146 #endif // __HAL_FSMC_H 147 //////////////////////////////////////////////////////////////////////////////// 148