1 ////////////////////////////////////////////////////////////////////////////////
2 /// @file hal_sdio.c
3 /// @author AE TEAM
4 /// @brief THIS FILE PROVIDES ALL THE SDIO FIRMWARE FUNCTIONS.
5 ////////////////////////////////////////////////////////////////////////////////
6 /// @attention
7 ///
8 /// THE EXISTING FIRMWARE IS ONLY FOR REFERENCE, WHICH IS DESIGNED TO PROVIDE
9 /// CUSTOMERS WITH CODING INFORMATION ABOUT THEIR PRODUCTS SO THEY CAN SAVE
10 /// TIME. THEREFORE, MINDMOTION SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT OR
11 /// CONSEQUENTIAL DAMAGES ABOUT ANY CLAIMS ARISING OUT OF THE CONTENT OF SUCH
12 /// HARDWARE AND/OR THE USE OF THE CODING INFORMATION CONTAINED HEREIN IN
13 /// CONNECTION WITH PRODUCTS MADE BY CUSTOMERS.
14 ///
15 /// <H2><CENTER>© COPYRIGHT MINDMOTION </CENTER></H2>
16 ////////////////////////////////////////////////////////////////////////////////
17
18 // Define to prevent recursive inclusion
19 #define _HAL_SDIO_C_
20 #include "reg_sdio.h"
21 #include "hal_sdio.h"
22 #include "hal_rcc.h"
23
24
25
26 ////////////////////////////////////////////////////////////////////////////////
27 /// @addtogroup MM32_Hardware_Abstract_Layer
28 /// @{
29
30 ////////////////////////////////////////////////////////////////////////////////
31 /// @addtogroup SDIO_HAL
32 /// @{
33
34 ////////////////////////////////////////////////////////////////////////////////
35 /// @addtogroup SDIO_Exported_Functions
36 /// @{
37 ////////////////////////////////////////////////////////////////////////////////
38 /// @brief Deinitializes the SDIO peripheral registers to their default reset
39 /// values.
40 /// @param None.
41 /// @retval None.
42 ////////////////////////////////////////////////////////////////////////////////
SDIO_DeInit(void)43 void SDIO_DeInit(void)
44 {
45 RCC_AHBPeriphResetCmd(RCC_AHBRSTR_SDIO, ENABLE);
46 RCC_AHBPeriphResetCmd(RCC_AHBRSTR_SDIO, DISABLE);
47 }
48 ////////////////////////////////////////////////////////////////////////////////
49 /// @brief Fills each SDIO_InitStruct member with its default value.
50 /// @param SDIO_InitStruct: pointer to an SDIO_InitTypeDef structure which
51 /// will be initialized.
52 /// @retval None.
53 ////////////////////////////////////////////////////////////////////////////////
SDIO_StructInit(SDIO_InitTypeDef * SDIO_InitStruct)54 void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct)
55 {
56 // SDIO_InitStruct members default value
57 SDIO_InitStruct->SDIO_MDEN = 0;
58 SDIO_InitStruct->SDIO_DATWT = 0;
59 SDIO_InitStruct->SDIO_SelPTSM = 0;
60 SDIO_InitStruct->SDIO_CLKSP = 0;
61 SDIO_InitStruct->SDIO_OUTM = 0;
62 SDIO_InitStruct->SDIO_SelSM = 0;
63 SDIO_InitStruct->SDIO_OPMSel = 0;
64 }
65
66
67 ///
68 /// @brief Fills each SDIO_DataInitStruct member with its default value.
69 /// @param SDIO_DataInitStruct: pointer to an SDIO_DataInitTypeDef structure which
70 /// will be initialized.
71 /// @retval None
72 ///
SDIO_DataStructInit(SDIO_DataInitTypeDef * SDIO_DataInitStruct)73 void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct)
74 {
75 /* SDIO_DataInitStruct members default value */
76 SDIO_DataInitStruct->SDIO_DataTimeOut = 0xFFFFFFFF;
77 SDIO_DataInitStruct->SDIO_DataLength = 0x00;
78 SDIO_DataInitStruct->SDIO_DataBlockSize = SDIO_DataBlockSize_1b;
79 SDIO_DataInitStruct->SDIO_TransferDir = SDIO_TransferDir_ToCard;
80 // SDIO_DataInitStruct->SDIO_TransferMode = SDIO_TransferMode_Block;
81 // SDIO_DataInitStruct->SDIO_DPSM = SDIO_DPSM_Disable;
82 }
83
84 ///
85 /// @brief Initializes the SDIO data path according to the specified
86 /// parameters in the SDIO_DataInitStruct.
87 /// @param SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure that
88 /// contains the configuration information for the SDIO command.
89 /// @retval None
90 ///
91 //void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct)
92 //{
93 // u32 tmpreg = 0;
94
95 // /*---------------------------- SDIO DTIMER Configuration ---------------------*/
96 // /* Set the SDIO Data TimeOut value */
97 // SDIO->MMC_TIMEOUTCNT = SDIO_DataInitStruct->SDIO_DataTimeOut;
98
99 // /*---------------------------- SDIO DLEN Configuration -----------------------*/
100 // /* Set the SDIO DataLength value */
101 // SDIO->MMC_BYTECNTL = SDIO_DataInitStruct->SDIO_DataLength;
102
103 // /*---------------------------- SDIO DCTRL Configuration ----------------------*/
104 // /* Get the SDIO DCTRL value */
105 // tmpreg = SDIO->DCTRL;
106 // /* Clear DEN, DTMODE, DTDIR and DBCKSIZE bits */
107 // tmpreg &= DCTRL_CLEAR_MASK;
108 // /* Set DEN bit according to SDIO_DPSM value */
109 // /* Set DTMODE bit according to SDIO_TransferMode value */
110 // /* Set DTDIR bit according to SDIO_TransferDir value */
111 // /* Set DBCKSIZE bits according to SDIO_DataBlockSize value */
112 // tmpreg |= (u32)SDIO_DataInitStruct->SDIO_DataBlockSize | SDIO_DataInitStruct->SDIO_TransferDir;//
113 // //| SDIO_DataInitStruct->SDIO_TransferMode | SDIO_DataInitStruct->SDIO_DPSM;
114
115 // /* Write to SDIO DCTRL */
116 // SDIO->DCTRL = tmpreg;
117 //}
118 ////////////////////////////////////////////////////////////////////////////////
119 /// @brief The frequency division factor is configured to generate the SDIO clock.
120 /// @param value : 1MHz = Fhclk/((mmc_cardsel[5 : 0] + 1) × 2)
121 /// @retval None.
122 ////////////////////////////////////////////////////////////////////////////////
SDIO_ClockSet(u32 value)123 void SDIO_ClockSet(u32 value)
124 {
125 // SDIO->MMC_CARDSEL &= ~SDIO_MMC_CARDSEL_MASK;
126 SDIO->MMC_CARDSEL = (SDIO_MMC_CARDSEL_CTREN | SDIO_MMC_CARDSEL_ENPCLK | (value & 0x3F));
127 // SDIO->MMC_CARDSEL = 0xC0+0x2F;//0xdf;
128 }
129 ////////////////////////////////////////////////////////////////////////////////
130 /// @brief Initializes the SDIO peripheral according to the specified
131 /// parameters in the SDIO_InitStruct.
132 /// @param SDIO_InitStruct : pointer to a SDIO_InitTypeDef structure
133 /// that contains the configuration information for the SDIO peripheral.
134 /// @retval None.
135 ////////////////////////////////////////////////////////////////////////////////
SDIO_Init(SDIO_InitTypeDef * SDIO_InitStruct)136 void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct)
137 {
138 SDIO->MMC_CTRL &= 0x700;
139 SDIO->MMC_CTRL |= (SDIO_InitStruct->SDIO_OPMSel | SDIO_InitStruct->SDIO_SelSM |
140 SDIO_InitStruct->SDIO_OUTM | SDIO_InitStruct->SDIO_CLKSP |
141 SDIO_InitStruct->SDIO_SelPTSM | SDIO_InitStruct->SDIO_DATWT |
142 SDIO_InitStruct->SDIO_MDEN);
143 }
144 ////////////////////////////////////////////////////////////////////////////////
145 /// @brief Enables or disables the SDIO interrupts.
146 /// @param SDIO_IT: specifies the SDIO interrupt sources to be enabled or disabled.
147 /// state : new state of the specified SDIO interrupts.
148 /// @retval None.
149 ////////////////////////////////////////////////////////////////////////////////
SDIO_ITConfig(u32 SDIO_IT,FunctionalState state)150 void SDIO_ITConfig(u32 SDIO_IT, FunctionalState state)
151 {
152 (state) ? (SDIO->MMC_INT_MASK |= SDIO_IT) : (SDIO->MMC_INT_MASK &= ~SDIO_IT);
153 }
154 ////////////////////////////////////////////////////////////////////////////////
155 /// @brief Enables or disables the SDIO CRC.
156 /// @param SDIO_CRC: specifies the SDIO CRC sources to be enabled or disabled.
157 /// state : new state of the specified SDIO CRC.
158 /// @retval None.
159 ////////////////////////////////////////////////////////////////////////////////
SDIO_CRCConfig(u32 SDIO_CRC,FunctionalState state)160 void SDIO_CRCConfig(u32 SDIO_CRC, FunctionalState state)
161 {
162 (state) ? (SDIO->MMC_CRCCTL |= SDIO_CRC) : (SDIO->MMC_CRCCTL &= ~SDIO_CRC);
163 }
164
165 ////////////////////////////////////////////////////////////////////////////////
166 /// @brief Port transfer speed mode.
167 /// @param clkdiv : High/low speed.
168 /// @retval None.
169 ////////////////////////////////////////////////////////////////////////////////
SDIO_Clock_Set(u8 clkdiv)170 void SDIO_Clock_Set(u8 clkdiv)
171 {
172 SDIO->MMC_CTRL &= ~SDIO_MMC_CTRL_SelPTSM;
173 (clkdiv) ? (SDIO->MMC_CTRL |= SDIO_MMC_CTRL_SelPTSM) : (SDIO->MMC_CTRL &= ~SDIO_MMC_CTRL_SelPTSM);
174 }
175 ////////////////////////////////////////////////////////////////////////////////
176 /// @brief Turn off the SDIO switch.
177 /// @param None.
178 /// @retval None.
179 ////////////////////////////////////////////////////////////////////////////////
SD_PowerOFF(void)180 SD_Error SD_PowerOFF(void)
181 {
182 SDIO->MMC_CARDSEL &= ~(SDIO_MMC_CARDSEL_ENPCLK | SDIO_MMC_CARDSEL_CTREN);
183 return SD_OK;
184 }
185 ///
186 /// @brief Fills each SDIO_CmdInitStruct member with its default value.
187 /// @param SDIO_CmdInitStruct: pointer to an SDIO_CmdInitTypeDef
188 /// structure which will be initialized.
189 /// @retval None
190 ///
SDIO_CmdStructInit(SDIO_CmdInitTypeDef * SDIO_CmdInitStruct)191 void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct)
192 {
193 /* SDIO_CmdInitStruct members default value */
194 SDIO_CmdInitStruct->SDIO_Argument = 0x00;
195 SDIO_CmdInitStruct->SDIO_CmdIndex = 0x00;
196 SDIO_CmdInitStruct->SDIO_Response = SDIO_Response_No;
197 SDIO_CmdInitStruct->SDIO_Wait = SDIO_Wait_No;
198 // SDIO_CmdInitStruct->SDIO_CPSM = SDIO_CPSM_Disable;
199 }
200
201 ////////////////////////////////////////////////////////////////////////////////
202 /// @brief SDIO sends command functions.
203 /// @param cmdindex : Type the command.
204 /// waitrsp : Expected correspondence.
205 /// arg : parameter.
206 /// @retval None.
207 ////////////////////////////////////////////////////////////////////////////////
SDIO_Send_Cmd(u8 cmdindex,u8 waitrsp,u32 arg)208 void SDIO_Send_Cmd(u8 cmdindex, u8 waitrsp, u32 arg)
209 {
210 SDIO->CMD_BUF0 = (arg >> 0) & 0xFF;
211 SDIO->CMD_BUF1 = (arg >> 8) & 0xFF;
212 SDIO->CMD_BUF2 = (arg >> 16) & 0xFF;
213 SDIO->CMD_BUF3 = (arg >> 24) & 0xFF;
214 SDIO->CMD_BUF4 = 0x40 | cmdindex;
215 SDIO->CLR_MMC_INT |= 0;
216 SDIO->MMC_IO = SDIO_MMC_IO_AUTOTR;
217 while(1) {
218 if(SDIO->CLR_MMC_INT & SDIO_CLR_MMC_INT_CMDDMC) {
219 SDIO->CLR_MMC_INT |= SDIO_CLR_MMC_INT_CMDDMC;
220 break;
221 }
222 }
223 if(waitrsp == SDIO_Response_Short) {
224 SDIO->MMC_IO = SDIO_MMC_IO_AUTOCLKG | \
225 SDIO_MMC_IO_AUTOTR | \
226 SDIO_MMC_IO_RESPCMDSEL;
227 }
228 else if(waitrsp == SDIO_Response_Long) {
229 SDIO->MMC_IO = SDIO_MMC_IO_AUTOCLKG | \
230 SDIO_MMC_IO_AUTOTR | \
231 SDIO_MMC_IO_RESPCMDSEL | \
232 SDIO_MMC_IO_CID_CSDRD;
233 }
234 else {
235 }
236 }
237 ////////////////////////////////////////////////////////////////////////////////
238 /// @brief Check the execution status of CMD0.
239 /// @param None.
240 /// @retval card error code.
241 ////////////////////////////////////////////////////////////////////////////////
CmdError(void)242 SD_Error CmdError(void)
243 {
244 SD_Error errorstatus = SD_OK;
245 u32 timeout = SDIO_CMD0TIMEOUT;
246 while (timeout--) {
247 if(((SDIO->MMC_IO & SDIO_MMC_IO_RESPCMDSEL) == 0) && ((SDIO->MMC_IO & SDIO_MMC_IO_AUTOTR) == 0))
248 break;
249 }
250 if (timeout == 0)
251 return SD_CMD_RSP_TIMEOUT;
252 SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_MASK;
253 return errorstatus;
254 }
255 ////////////////////////////////////////////////////////////////////////////////
256 /// @brief Check the error status of the R1 response.
257 /// @param cmd : Current command.
258 /// @retval card error code.
259 ////////////////////////////////////////////////////////////////////////////////
CmdResp1Error(u8 cmd)260 SD_Error CmdResp1Error(u8 cmd)
261 {
262 u32 status;
263 u32 response;
264 while(1) {
265 status = SDIO->CLR_MMC_INT ;
266 if(status & (SDIO_CLR_MMC_INT_CRCEMC | SDIO_CLR_MMC_INT_CRNTMC | SDIO_CLR_MMC_INT_CMDDMC))
267 break;
268 }
269 if(status & SDIO_CLR_MMC_INT_CRNTMC) {
270 SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRNTMC;
271 return SD_CMD_RSP_TIMEOUT;
272 }
273 if(status & (SDIO_CLR_MMC_INT_CRCEMC)) {
274 SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRCEMC;
275 return SD_CMD_CRC_FAIL;
276 }
277 SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_MASK;
278
279 if((SDIO->CMD_BUF4 & 0x3F) != cmd) {
280 return SD_ILLEGAL_CMD;
281 }
282 response = SDIO->CMD_BUF3 << 24 | SDIO->CMD_BUF2 << 16 | SDIO->CMD_BUF1 << 8 | SDIO->CMD_BUF0;
283 return (SD_Error)(response & SD_OCR_ERRORBITS);
284 }
285 ////////////////////////////////////////////////////////////////////////////////
286 /// @brief Check the execution status of CMD2.
287 /// @param None.
288 /// @retval card error code.
289 ////////////////////////////////////////////////////////////////////////////////
CmdResp2Error(void)290 SD_Error CmdResp2Error(void)
291 {
292 SD_Error errorstatus = SD_OK;
293 u32 status;
294 u32 timeout = SDIO_CMD0TIMEOUT;
295 while(timeout--) {
296 status = SDIO->CLR_MMC_INT ;
297 if(status & (SDIO_CLR_MMC_INT_CRCEMC | SDIO_CLR_MMC_INT_CRNTMC | SDIO_CLR_MMC_INT_CMDDMC))
298 break;
299 }
300 if((timeout == 0) || (status & SDIO_CLR_MMC_INT_CRNTMC)) {
301 errorstatus = SD_CMD_RSP_TIMEOUT;
302 SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRNTMC;
303 return errorstatus;
304 }
305 if(status & SDIO_CLR_MMC_INT_CRCEMC) {
306 errorstatus = SD_CMD_CRC_FAIL;
307 SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRCEMC;
308 }
309 SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_MASK;
310 return errorstatus;
311 }
312 ////////////////////////////////////////////////////////////////////////////////
313 /// @brief Check the execution status of CMD3.
314 /// @param None.
315 /// @retval card error code.
316 ////////////////////////////////////////////////////////////////////////////////
CmdResp3Error(void)317 SD_Error CmdResp3Error(void)
318 {
319 u32 status;
320 while(1) {
321 status = SDIO->CLR_MMC_INT ;
322 if(status & (SDIO_CLR_MMC_INT_CRCEMC | SDIO_CLR_MMC_INT_CRNTMC | SDIO_CLR_MMC_INT_CMDDMC))
323 break;
324 }
325 if(status & SDIO_CLR_MMC_INT_CRNTMC) {
326 SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRNTMC;
327 return SD_CMD_RSP_TIMEOUT;
328 }
329 SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_MASK;
330 return SD_OK;
331 }
332 ////////////////////////////////////////////////////////////////////////////////
333 /// @brief Check the execution status of CMD6.
334 /// @param None.
335 /// @retval card error code.
336 ////////////////////////////////////////////////////////////////////////////////
CmdResp6Error(u8 cmd,u16 * prca)337 SD_Error CmdResp6Error(u8 cmd, u16* prca)
338 {
339 SD_Error errorstatus = SD_OK;
340 u32 status;
341 u32 rspr1;
342 while(1) {
343 status = SDIO->CLR_MMC_INT ;
344 if(status & (SDIO_CLR_MMC_INT_CRCEMC | SDIO_CLR_MMC_INT_CRNTMC | SDIO_CLR_MMC_INT_CMDDMC))
345 break;
346 }
347 if(status & SDIO_CLR_MMC_INT_CRNTMC) {
348 SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRNTMC;
349 return SD_CMD_RSP_TIMEOUT;
350 }
351 if(status & SDIO_CLR_MMC_INT_CRCEMC) {
352 SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRCEMC;
353 return SD_CMD_CRC_FAIL;
354 }
355 if((SDIO->CMD_BUF4 & 0x3F) != cmd) {
356 return SD_ILLEGAL_CMD;
357 }
358 SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_MASK;
359 rspr1 = SDIO->CMD_BUF3 << 24 | SDIO->CMD_BUF2 << 16 | SDIO->CMD_BUF1 << 8 | SDIO->CMD_BUF0;
360 if(SD_ALLZERO == (rspr1 & (SD_R6_GENERAL_UNKNOWN_ERROR | SD_R6_ILLEGAL_CMD | SD_R6_COM_CRC_FAILED))) {
361 *prca = (u16)(rspr1 >> 16);
362 return errorstatus;
363 }
364 if(rspr1 & SD_R6_GENERAL_UNKNOWN_ERROR) {
365 return SD_GENERAL_UNKNOWN_ERROR;
366 }
367 if(rspr1 & SD_R6_ILLEGAL_CMD) {
368 return SD_ILLEGAL_CMD;
369 }
370 if(rspr1 & SD_R6_COM_CRC_FAILED) {
371 return SD_COM_CRC_FAILED;
372 }
373 return errorstatus;
374 }
375 ////////////////////////////////////////////////////////////////////////////////
376 /// @brief Check the execution status of CMD7.
377 /// @param None.
378 /// @retval card error code.
379 ////////////////////////////////////////////////////////////////////////////////
CmdResp7Error(void)380 SD_Error CmdResp7Error(void)
381 {
382 SD_Error errorstatus = SD_OK;
383 u32 status;
384 u32 timeout = SDIO_CMD0TIMEOUT;
385 while(timeout--) {
386 status = SDIO->CLR_MMC_INT ;
387 if(status & (SDIO_CLR_MMC_INT_CRCEMC | SDIO_CLR_MMC_INT_CRNTMC | SDIO_CLR_MMC_INT_CMDDMC))
388 break;
389 }
390 if((timeout == 0) || (status & SDIO_CLR_MMC_INT_CRNTMC)) { //timeout
391 errorstatus = SD_CMD_RSP_TIMEOUT;
392 SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRNTMC;
393 return errorstatus;
394 }
395 if(status & SDIO_CLR_MMC_INT_CMDDMC) {
396 errorstatus = SD_OK;
397 SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CMDDMC;
398 }
399 return errorstatus;
400 }
401
402
403 ////////////////////////////////////////////////////////////////////////////////
404 /// @brief Write data direction block size configuration.
405 /// @param datatimeout : maximum latency.
406 /// datalen : data len
407 /// blksize : block count.
408 /// dir : direction
409 /// @retval None.
410 ////////////////////////////////////////////////////////////////////////////////
SDIO_Send_Data_Cfg(u32 datatimeout,u32 datalen,u8 blksize,u8 dir)411 void SDIO_Send_Data_Cfg(u32 datatimeout, u32 datalen, u8 blksize, u8 dir)
412 {
413 u32 tmpreg, tmpreg1, tmpreg2 = 0;
414 tmpreg = SDIO->MMC_IO_MBCTL;
415 tmpreg1 = SDIO->MMC_IO;
416 tmpreg &= ~(SDIO_MMC_IO_MBCTL_BTSSel | SDIO_MMC_IO_MBCTL_SPMBDTR | SDIO_MMC_IO_MBCTL_SMBDTD);
417 if (datatimeout < 100) {
418 SDIO->MMC_TIMEOUTCNT = datatimeout;
419 }
420 else if (datatimeout < 10000) {
421 SDIO->MMC_TIMEOUTCNT = datatimeout / 100;
422 tmpreg |= SDIO_MMC_IO_MBCTL_BTSSel;
423 }
424 else if (datatimeout < 1000000) {
425 SDIO->MMC_TIMEOUTCNT = datatimeout / 10000;
426 tmpreg |= SDIO_MMC_IO_MBCTL_BTSSel_2;
427 }
428 else {
429 SDIO->MMC_TIMEOUTCNT = datatimeout / 1000000;
430 tmpreg |= SDIO_MMC_IO_MBCTL_BTSSel;
431 }
432 SDIO->MMC_BYTECNTL = datalen & 0x1FFFFFF; ;
433 SDIO->MMC_BLOCKCNT = blksize;
434 if (dir == 0) {
435 tmpreg |= SDIO_MMC_IO_MBCTL_SMBDTD;
436 tmpreg1 |= SDIO_MMC_IO_TRANSFDIR;
437 tmpreg2 |= SDIO_BUF_CTLL_SBAD;
438 }
439 else {
440 tmpreg &= ~(SDIO_MMC_IO_MBCTL_SMBDTD);
441 tmpreg1 &= ~(SDIO_MMC_IO_TRANSFDIR);
442 tmpreg2 &= ~(SDIO_BUF_CTLL_SBAD);
443 }
444 SDIO->MMC_IO_MBCTL = tmpreg;
445 SDIO->MMC_IO = tmpreg1;
446 SDIO->BUF_CTL = tmpreg2;
447 }
448 ////////////////////////////////////////////////////////////////////////////////
449 /// @brief Clears the SDIO's Flag pending bits.
450 /// @param SDIO_IT: specifies the flag pending bit to clear.
451 /// @retval None.
452 ////////////////////////////////////////////////////////////////////////////////
SDIO_ClearFlag(u32 SDIO_FLAG)453 void SDIO_ClearFlag(u32 SDIO_FLAG)
454 {
455 SDIO->CLR_MMC_INT |= SDIO_FLAG;
456 }
457 ////////////////////////////////////////////////////////////////////////////////
458 /// @brief Clears the SDIO's interrupt pending bits.
459 /// @param SDIO_IT: specifies the interrupt pending bit to clear.
460 /// @retval None.
461 ////////////////////////////////////////////////////////////////////////////////
SDIO_ClearITPendingBit(u32 SDIO_IT)462 void SDIO_ClearITPendingBit(u32 SDIO_IT)
463 {
464 SDIO->CLR_MMC_INT |= SDIO_IT;
465 }
466 ////////////////////////////////////////////////////////////////////////////////
467 /// @brief Checks whether the specified SDIO flag is set or not.
468 /// @param SDIO_FLAG: specifies the flag to check.
469 /// @retval The new state of SDIO_FLAG (SET or RESET).
470 ////////////////////////////////////////////////////////////////////////////////
SDIO_GetFlagStatus(u32 SDIO_FLAG)471 FlagStatus SDIO_GetFlagStatus(u32 SDIO_FLAG)
472 {
473 return ((SDIO->CLR_MMC_INT & SDIO_FLAG) ? SET : RESET);
474 }
475 ////////////////////////////////////////////////////////////////////////////////
476 /// @brief Reads the value of the data transfer timeout count
477 /// @param None.
478 /// @retval timeout count.
479 ////////////////////////////////////////////////////////////////////////////////
SDIO_GetTimeOutCounter(void)480 u32 SDIO_GetTimeOutCounter(void)
481 {
482 return (SDIO->MMC_TIMEOUTCNT & 0xFF);
483 }
484 ////////////////////////////////////////////////////////////////////////////////
485 /// @brief Read one data word from FIFO.
486 /// @param None.
487 /// @retval Data received.
488 ////////////////////////////////////////////////////////////////////////////////
SDIO_ReadData(void)489 u32 SDIO_ReadData(void)
490 {
491 return SDIO->FIFO;
492 }
493 ////////////////////////////////////////////////////////////////////////////////
494 /// @brief Write one data word to FIFO.
495 /// @param tempbuff : Write data.
496 /// @retval None.
497 ////////////////////////////////////////////////////////////////////////////////
SDIO_WriteData(u32 tempbuff)498 void SDIO_WriteData(u32 tempbuff)
499 {
500 SDIO->FIFO = tempbuff;
501 }
502 ////////////////////////////////////////////////////////////////////////////////
503 /// @brief Returns number of remaining data bytes to be transferred.
504 /// @param None
505 /// @retval Number of remaining data bytes to be transferred
506 ////////////////////////////////////////////////////////////////////////////////
SDIO_GetDataCounter(void)507 u32 SDIO_GetDataCounter(void)
508 {
509 return SDIO->MMC_BYTECNTL;
510 }
511 ////////////////////////////////////////////////////////////////////////////////
512 /// @brief Enable or Dsiable DMA .
513 /// @param tempbuff : Write data.
514 /// @retval None.
515 ////////////////////////////////////////////////////////////////////////////////
SDIO_DMACmd(FunctionalState state)516 void SDIO_DMACmd(FunctionalState state)
517 {
518 (state) ? ((SDIO->BUF_CTL |= SDIO_BUF_CTLL_DMAHEN), SDIO->BUF_CTL &= (~(SDIO_BUF_CTLL_DRM))) : (SDIO->BUF_CTL &= ~SDIO_BUF_CTLL_DMAHEN);
519 }
520
521
522 /// @}
523
524 /// @}
525
526 /// @}
527
528