1; //////////////////////////////////////////////////////////////////////////////// 2; /// @file startup_mm32f327x_keil.s 3; /// @author AE TEAM 4; /// @brief THIS FILE PROVIDES ALL THE Device Startup File of MM32 Cortex-M 5; /// Core Device for ARM KEIL toolchain. 6; //////////////////////////////////////////////////////////////////////////////// 7; /// @attention 8; /// 9; /// THE EXISTING FIRMWARE IS ONLY FOR REFERENCE, WHICH IS DESIGNED TO PROVIDE 10; /// CUSTOMERS WITH CODING INFORMATION ABOUT THEIR PRODUCTS SO THEY CAN SAVE 11; /// TIME. THEREFORE, MINDMOTION SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT OR 12; /// CONSEQUENTIAL DAMAGES ABOUT ANY CLAIMS ARISING OUT OF THE CONTENT OF SUCH 13; /// HARDWARE AND/OR THE USE OF THE CODING INFORMATION CONTAINED HEREIN IN 14; /// CONNECTION WITH PRODUCTS MADE BY CUSTOMERS. 15; /// 16; /// <H2><CENTER>© COPYRIGHT MINDMOTION </CENTER></H2> 17; ////////////////////////////////////////////////////////////////////////////// 18; 19; Amount of memory (in bytes) allocated for Stack 20; Tailor this value to your application needs 21; <h> Stack Configuration 22; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 23; </h> 24 25Stack_Size EQU 0x00000400 26 27 AREA STACK, NOINIT, READWRITE, ALIGN=3 28Stack_Mem SPACE Stack_Size 29__initial_sp 30 31; <h> Heap Configuration 32; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 33; </h> 34Heap_Size EQU 0x00000200 35 36 AREA HEAP, NOINIT, READWRITE, ALIGN=3 37__heap_base 38Heap_Mem SPACE Heap_Size 39__heap_limit 40 41 PRESERVE8 42 THUMB 43 44; Vector Table Mapped to Address 0 at Reset 45 AREA RESET, DATA, READONLY 46 EXPORT __Vectors 47 EXPORT __Vectors_End 48 EXPORT __Vectors_Size 49 50__Vectors DCD __initial_sp ; Top of Stack 51 DCD Reset_Handler ; Reset Handler 52 DCD NMI_Handler ; -14 NMI Handler 53 DCD HardFault_Handler ; -13 Hard Fault Handler 54 DCD MemManage_Handler ; -12 MPU Fault Handler 55 DCD BusFault_Handler ; -11 Bus Fault Handler 56 DCD UsageFault_Handler ; -10 Usage Fault Handler 57__vector_table_0x1c 58 DCD 0 ; -9 Reserved 59 DCD 0 ; -8 Reserved 60 DCD 0 ; -7 Reserved 61 DCD 0 ; -6 Reserved 62 DCD SVC_Handler ; -5 SVCall Handler 63 DCD DebugMon_Handler ; -4 Debug Monitor Handler 64 DCD 0 ; -3 Reserved 65 DCD PendSV_Handler ; -2 PendSV Handler 66 DCD SysTick_Handler ; -1 SysTick Handler ; External Interrupts 67 DCD WWDG_IRQHandler ; 0 Window Watchdog 68 DCD PVD_IRQHandler ; 1 PVD through EXTI Line detect 69 DCD TAMPER_IRQHandler ; 2 Tamper 70 DCD RTC_IRQHandler ; 3 RTC 71 DCD FLASH_IRQHandler ; 4 Flash 72 DCD RCC_CRS_IRQHandler ; 5 RCC 73 DCD EXTI0_IRQHandler ; 6 EXTI Line 0 74 DCD EXTI1_IRQHandler ; 7 EXTI Line 1 75 DCD EXTI2_IRQHandler ; 8 EXTI Line 2 76 DCD EXTI3_IRQHandler ; 9 EXTI Line 3 77 DCD EXTI4_IRQHandler ; 10 EXTI Line 4 78 DCD DMA1_Channel1_IRQHandler ; 11 DMA1 Channel 1 79 DCD DMA1_Channel2_IRQHandler ; 12 DMA1 Channel 2 80 DCD DMA1_Channel3_IRQHandler ; 13 DMA1 Channel 3 81 DCD DMA1_Channel4_IRQHandler ; 14 DMA1 Channel 4 82 DCD DMA1_Channel5_IRQHandler ; 15 DMA1 Channel 5 83 DCD DMA1_Channel6_IRQHandler ; 16 DMA1 Channel 6 84 DCD DMA1_Channel7_IRQHandler ; 17 DMA1 Channel 7 85 DCD ADC1_2_IRQHandler ; 18 ADC1 and ADC2 86 DCD FlashCache_IRQHandler ; 19 FlashCache outage 87 DCD 0 ; 20 Reserved 88 DCD CAN1_RX_IRQHandler ; 21 CAN1_RX 89 DCD 0 ; 22 Reserved 90 DCD EXTI9_5_IRQHandler ; 23 EXTI Line 9..5 91 DCD TIM1_BRK_IRQHandler ; 24 TIM1 Break 92 DCD TIM1_UP_IRQHandler ; 25 TIM1 Update 93 DCD TIM1_TRG_COM_IRQHandler ; 26 TIM1 Trigger and Commutation 94 DCD TIM1_CC_IRQHandler ; 27 TIM1 Capture Compare 95 DCD TIM2_IRQHandler ; 28 TIM2 96 DCD TIM3_IRQHandler ; 29 TIM3 97 DCD TIM4_IRQHandler ; 30 TIM4 98 DCD I2C1_IRQHandler ; 31 I2C1 Event 99 DCD 0 ; 32 Reserved 100 DCD I2C2_IRQHandler ; 33 I2C2 Event 101 DCD 0 ; 34 Reserved 102 DCD SPI1_IRQHandler ; 35 SPI1 103 DCD SPI2_IRQHandler ; 36 SPI2 104 DCD UART1_IRQHandler ; 37 UART1 105 DCD UART2_IRQHandler ; 38 UART2 106 DCD UART3_IRQHandler ; 39 UART3 107 DCD EXTI15_10_IRQHandler ; 40 EXTI Line 15..10 108 DCD RTCAlarm_IRQHandler ; 41 RTC Alarm through EXTI Line 17 109 DCD OTG_FS_WKUP_IRQHandler ; 42 USB OTG FS Wakeup through EXTI line 110 DCD TIM8_BRK_IRQHandler ; 43 TIM8 Break 111 DCD TIM8_UP_IRQHandler ; 44 TIM8 Update 112 DCD TIM8_TRG_COM_IRQHandler ; 45 TIM8 Trigger and Commutation 113 DCD TIM8_CC_IRQHandler ; 46 TIM8 Capture Compare 114 DCD ADC3_IRQHandler ; 47 ADC3 115 DCD 0 ; 48 Reserved 116 DCD SDIO_IRQHandler ; 49 SDIO 117 DCD TIM5_IRQHandler ; 50 TIM5 118 DCD SPI3_IRQHandler ; 51 SPI3 119 DCD UART4_IRQHandler ; 52 UART4 120 DCD UART5_IRQHandler ; 53 UART5 121 DCD TIM6_IRQHandler ; 54 TIM6 122 DCD TIM7_IRQHandler ; 55 TIM7 123 DCD DMA2_Channel1_IRQHandler ; 56 DMA2 Channel 1 124 DCD DMA2_Channel2_IRQHandler ; 57 DMA2 Channel 2 125 DCD DMA2_Channel3_IRQHandler ; 58 DMA2 Channel 3 126 DCD DMA2_Channel4_IRQHandler ; 59 DMA2 Channel 4 127 DCD DMA2_Channel5_IRQHandler ; 60 DMA2 Channel 5 128 DCD ETH_IRQHandler ; 61 Ethernet 129 DCD 0 ; 62 Reserved 130 DCD 0 ; 63 Reserved 131 DCD COMP1_2_IRQHandler ; 64 COMP1,COMP2 132 DCD 0 ; 65 Reserved 133 DCD 0 ; 66 Reserved 134 DCD OTG_FS_IRQHandler ; 67 USB OTG_FullSpeed 135 DCD 0 ; 68 Reserved 136 DCD 0 ; 69 Reserved 137 DCD 0 ; 70 Reserved 138 DCD UART6_IRQHandler ; 71 UART6 139 DCD 0 ; 72 Reserved 140 DCD 0 ; 73 Reserved 141 DCD 0 ; 74 Reserved 142 DCD 0 ; 75 Reserved 143 DCD 0 ; 76 Reserved 144 DCD 0 ; 77 Reserved 145 DCD 0 ; 78 Reserved 146 DCD 0 ; 79 Reserved 147 DCD 0 ; 80 Reserved 148 DCD 0 ; 81 Reserved 149 DCD UART7_IRQHandler ; 82 UART7 150 DCD UART8_IRQHandler ; 83 UART8 151 152__Vectors_End 153 154__Vectors_Size EQU __Vectors_End - __Vectors 155 156 AREA |.text|, CODE, READONLY 157 158; Reset handler 159Reset_Handler PROC 160 EXPORT Reset_Handler [WEAK] 161 IMPORT __main 162 IMPORT SystemInit 163 LDR R0, =SystemInit 164 BLX R0 165 LDR R0, =__main 166 BX R0 167 ENDP 168 169; Dummy Exception Handlers (infinite loops which can be modified) 170 171NMI_Handler PROC 172 EXPORT NMI_Handler [WEAK] 173 B . 174 ENDP 175HardFault_Handler\ 176 PROC 177 EXPORT HardFault_Handler [WEAK] 178 B . 179 ENDP 180MemManage_Handler\ 181 PROC 182 EXPORT MemManage_Handler [WEAK] 183 B . 184 ENDP 185BusFault_Handler\ 186 PROC 187 EXPORT BusFault_Handler [WEAK] 188 B . 189 ENDP 190UsageFault_Handler\ 191 PROC 192 EXPORT UsageFault_Handler [WEAK] 193 B . 194 ENDP 195SVC_Handler PROC 196 EXPORT SVC_Handler [WEAK] 197 B . 198 ENDP 199DebugMon_Handler\ 200 PROC 201 EXPORT DebugMon_Handler [WEAK] 202 B . 203 ENDP 204PendSV_Handler PROC 205 EXPORT PendSV_Handler [WEAK] 206 B . 207 ENDP 208SysTick_Handler PROC 209 EXPORT SysTick_Handler [WEAK] 210 B . 211 ENDP 212 213Default_Handler PROC 214 215 EXPORT WWDG_IRQHandler [WEAK] 216 EXPORT PVD_IRQHandler [WEAK] 217 EXPORT TAMPER_IRQHandler [WEAK] 218 EXPORT RTC_IRQHandler [WEAK] 219 EXPORT FLASH_IRQHandler [WEAK] 220 EXPORT RCC_CRS_IRQHandler [WEAK] 221 EXPORT EXTI0_IRQHandler [WEAK] 222 EXPORT EXTI1_IRQHandler [WEAK] 223 EXPORT EXTI2_IRQHandler [WEAK] 224 EXPORT EXTI3_IRQHandler [WEAK] 225 EXPORT EXTI4_IRQHandler [WEAK] 226 EXPORT DMA1_Channel1_IRQHandler [WEAK] 227 EXPORT DMA1_Channel2_IRQHandler [WEAK] 228 EXPORT DMA1_Channel3_IRQHandler [WEAK] 229 EXPORT DMA1_Channel4_IRQHandler [WEAK] 230 EXPORT DMA1_Channel5_IRQHandler [WEAK] 231 EXPORT DMA1_Channel6_IRQHandler [WEAK] 232 EXPORT DMA1_Channel7_IRQHandler [WEAK] 233 EXPORT ADC1_2_IRQHandler [WEAK] 234 EXPORT FlashCache_IRQHandler [WEAK] 235 EXPORT CAN1_RX_IRQHandler [WEAK] 236 EXPORT EXTI9_5_IRQHandler [WEAK] 237 EXPORT TIM1_BRK_IRQHandler [WEAK] 238 EXPORT TIM1_UP_IRQHandler [WEAK] 239 EXPORT TIM1_TRG_COM_IRQHandler [WEAK] 240 EXPORT TIM1_CC_IRQHandler [WEAK] 241 EXPORT TIM2_IRQHandler [WEAK] 242 EXPORT TIM3_IRQHandler [WEAK] 243 EXPORT TIM4_IRQHandler [WEAK] 244 EXPORT I2C1_IRQHandler [WEAK] 245 EXPORT I2C2_IRQHandler [WEAK] 246 EXPORT SPI1_IRQHandler [WEAK] 247 EXPORT SPI2_IRQHandler [WEAK] 248 EXPORT UART1_IRQHandler [WEAK] 249 EXPORT UART2_IRQHandler [WEAK] 250 EXPORT UART3_IRQHandler [WEAK] 251 EXPORT EXTI15_10_IRQHandler [WEAK] 252 EXPORT RTCAlarm_IRQHandler [WEAK] 253 EXPORT OTG_FS_WKUP_IRQHandler [WEAK] 254 EXPORT TIM8_BRK_IRQHandler [WEAK] 255 EXPORT TIM8_UP_IRQHandler [WEAK] 256 EXPORT TIM8_TRG_COM_IRQHandler [WEAK] 257 EXPORT TIM8_CC_IRQHandler [WEAK] 258 EXPORT ADC3_IRQHandler [WEAK] 259 EXPORT SDIO_IRQHandler [WEAK] 260 EXPORT TIM5_IRQHandler [WEAK] 261 EXPORT SPI3_IRQHandler [WEAK] 262 EXPORT UART4_IRQHandler [WEAK] 263 EXPORT UART5_IRQHandler [WEAK] 264 EXPORT TIM6_IRQHandler [WEAK] 265 EXPORT TIM7_IRQHandler [WEAK] 266 EXPORT DMA2_Channel1_IRQHandler [WEAK] 267 EXPORT DMA2_Channel2_IRQHandler [WEAK] 268 EXPORT DMA2_Channel3_IRQHandler [WEAK] 269 EXPORT DMA2_Channel4_IRQHandler [WEAK] 270 EXPORT DMA2_Channel5_IRQHandler [WEAK] 271 EXPORT ETH_IRQHandler [WEAK] 272 EXPORT COMP1_2_IRQHandler [WEAK] 273 EXPORT OTG_FS_IRQHandler [WEAK] 274 EXPORT UART6_IRQHandler [WEAK] 275 EXPORT UART7_IRQHandler [WEAK] 276 EXPORT UART8_IRQHandler [WEAK] 277 278WWDG_IRQHandler 279PVD_IRQHandler 280TAMPER_IRQHandler 281RTC_IRQHandler 282FLASH_IRQHandler 283RCC_CRS_IRQHandler 284EXTI0_IRQHandler 285EXTI1_IRQHandler 286EXTI2_IRQHandler 287EXTI3_IRQHandler 288EXTI4_IRQHandler 289DMA1_Channel1_IRQHandler 290DMA1_Channel2_IRQHandler 291DMA1_Channel3_IRQHandler 292DMA1_Channel4_IRQHandler 293DMA1_Channel5_IRQHandler 294DMA1_Channel6_IRQHandler 295DMA1_Channel7_IRQHandler 296ADC1_2_IRQHandler 297FlashCache_IRQHandler 298CAN1_RX_IRQHandler 299EXTI9_5_IRQHandler 300TIM1_BRK_IRQHandler 301TIM1_UP_IRQHandler 302TIM1_TRG_COM_IRQHandler 303TIM1_CC_IRQHandler 304TIM2_IRQHandler 305TIM3_IRQHandler 306TIM4_IRQHandler 307I2C1_IRQHandler 308I2C2_IRQHandler 309SPI1_IRQHandler 310SPI2_IRQHandler 311UART1_IRQHandler 312UART2_IRQHandler 313UART3_IRQHandler 314EXTI15_10_IRQHandler 315RTCAlarm_IRQHandler 316OTG_FS_WKUP_IRQHandler 317TIM8_BRK_IRQHandler 318TIM8_UP_IRQHandler 319TIM8_TRG_COM_IRQHandler 320TIM8_CC_IRQHandler 321ADC3_IRQHandler 322SDIO_IRQHandler 323TIM5_IRQHandler 324SPI3_IRQHandler 325UART4_IRQHandler 326UART5_IRQHandler 327TIM6_IRQHandler 328TIM7_IRQHandler 329DMA2_Channel1_IRQHandler 330DMA2_Channel2_IRQHandler 331DMA2_Channel3_IRQHandler 332DMA2_Channel4_IRQHandler 333DMA2_Channel5_IRQHandler 334ETH_IRQHandler 335COMP1_2_IRQHandler 336OTG_FS_IRQHandler 337UART6_IRQHandler 338UART7_IRQHandler 339UART8_IRQHandler 340 341 342 B . 343 344 ENDP 345 346 ALIGN 347 348;******************************************************************************* 349; User Stack and Heap initialization 350;******************************************************************************* 351 IF :DEF:__MICROLIB 352 353 EXPORT __initial_sp 354 EXPORT __heap_base 355 EXPORT __heap_limit 356 357 ELSE 358 359 IMPORT __use_two_region_memory 360 EXPORT __user_initial_stackheap 361 362__user_initial_stackheap 363 364 LDR R0, = Heap_Mem 365 LDR R1, = (Stack_Mem + Stack_Size) 366 LDR R2, = (Heap_Mem + Heap_Size) 367 LDR R3, = Stack_Mem 368 BX LR 369 370 ALIGN 371 372 ENDIF 373 374 END 375