1 /*
2 * Copyright (c) 2006-2023, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2023-03-17 letian first version
9 */
10 #include <HAL_device.h>
11 #include <rtdevice.h>
12 #include "drv_adc.h"
13 #include <hal_gpio.h>
14 #include <hal_adc.h>
15 #include <hal_rcc.h>
16 #include <hal_misc.h>
17
18 #if defined(BSP_USING_ADC)
19
20 #define ADC_CONFIG_GPIORCC RCC_AHBENR_GPIOA
21 #define ADC_CONFIG_GPIOX GPIOA
22 #define ADC_CONFIG_IOX GPIO_Pin_5 | GPIO_Pin_4
23
24 struct mm32_adc
25 {
26 struct rt_adc_device mm32_adc_device;
27 ADC_TypeDef *adc_x;
28 char *name;
29 };
30
31 #if defined(BSP_USING_ADC1)
32 struct mm32_adc mm32_adc1_config = {
33 .adc_x = ADC1,
34 .name = "adc1",
35 };
36 #endif /* BSP_USING_ADC1 */
37
38 #if defined(BSP_USING_ADC2)
39 struct mm32_adc mm32_adc2_config = {
40 .adc_x = ADC2,
41 .name = "adc2",
42 };
43 #endif /* BSP_USING_ADC2 */
44
ADCxChannelEnable(ADC_TypeDef * ADCn,ADCCHANNEL_TypeDef channel)45 static void ADCxChannelEnable(ADC_TypeDef* ADCn, ADCCHANNEL_TypeDef channel)
46 {
47 ADCn->CHSR &= ~(1 << channel);
48 ADCn->CHSR |= (1 << channel);
49 }
50
mm32_adc_init(struct rt_adc_device * device,rt_uint32_t channel,rt_bool_t enabled)51 static rt_err_t mm32_adc_init(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
52 {
53 ADC_InitTypeDef ADC_InitStruct;
54 ADC_TypeDef *adc_x;
55 RT_ASSERT(device != RT_NULL);
56 adc_x = device->parent.user_data;
57
58 #if defined(BSP_USING_ADC1)
59 RCC_APB2PeriphClockCmd(RCC_APB2ENR_ADC1, ENABLE); //Enable ADC1 clock
60 #endif /* BSP_USING_ADC1 */
61
62 #if defined(BSP_USING_ADC2)
63 RCC_APB2PeriphClockCmd(RCC_APB2ENR_ADC2, ENABLE); //Enable ADC2 clock
64 #endif /* BSP_USING_ADC2 */
65
66 ADC_StructInit(&ADC_InitStruct);
67 ADC_InitStruct.ADC_Resolution = ADC_Resolution_12b;
68 ADC_InitStruct.ADC_PRESCARE = ADC_PCLK2_PRESCARE_16; //ADC prescale factor
69 ADC_InitStruct.ADC_Mode = ADC_Mode_Continue; //Set ADC mode to continuous conversion mode
70 ADC_InitStruct.ADC_DataAlign = ADC_DataAlign_Right; //AD data right-justified
71 ADC_InitStruct.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
72 ADC_Init(adc_x, &ADC_InitStruct);
73
74 ADC_RegularChannelConfig(adc_x, channel, 0, ADC_Samctl_239_5);
75 ADC_Cmd(adc_x, ENABLE);
76 ADCxChannelEnable(adc_x, channel);
77
78 //config gpio
79 GPIO_InitTypeDef GPIO_InitStruct;
80 GPIO_StructInit(&GPIO_InitStruct);
81
82 RCC_AHBPeriphClockCmd(ADC_CONFIG_GPIORCC, ENABLE);
83 GPIO_InitStruct.GPIO_Pin = ADC_CONFIG_IOX;
84 GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
85 GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AIN;
86 GPIO_Init(ADC_CONFIG_GPIOX, &GPIO_InitStruct);
87
88 return RT_EOK;
89 }
90
mm32_get_adc_value(struct rt_adc_device * device,rt_uint32_t channel,rt_uint32_t * value)91 static rt_err_t mm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
92 {
93 ADC_TypeDef *adc_x;
94 RT_ASSERT(device != RT_NULL);
95 adc_x = device->parent.user_data;
96
97 ADC_SoftwareStartConvCmd(adc_x, ENABLE);
98 while(ADC_GetFlagStatus(adc_x, ADC_IT_EOC) == 0);
99 ADC_ClearFlag(adc_x, ADC_IT_EOC);
100 *value = ADC_GetConversionValue(adc_x);
101 return RT_EOK;
102 }
103
mm32_adc_get_resolution(struct rt_adc_device * device)104 static rt_uint8_t mm32_adc_get_resolution(struct rt_adc_device *device)
105 {
106 ADC_TypeDef *adc_x = device->parent.user_data;
107
108 RT_ASSERT(device != RT_NULL);
109
110 switch( ((adc_x->CFGR)&(0x00000380)) )
111 {
112 case ADC_Resolution_12b:
113 return 12;
114 case ADC_Resolution_11b:
115 return 11;
116 case ADC_Resolution_10b:
117 return 10;
118 case ADC_Resolution_9b:
119 return 9;
120 case ADC_Resolution_8b:
121 return 8;
122 default:
123 return 0;
124 }
125 }
126
mm32_adc_get_vref(struct rt_adc_device * device)127 static rt_int16_t mm32_adc_get_vref(struct rt_adc_device *device)
128 {
129 if(device == RT_NULL)
130 return -RT_ERROR;
131
132 return 3300;
133 }
134
135 static const struct rt_adc_ops mm32_adc_ops =
136 {
137 .enabled = mm32_adc_init,
138 .convert = mm32_get_adc_value,
139 .get_resolution = mm32_adc_get_resolution,
140 .get_vref = mm32_adc_get_vref,
141 };
142
rt_hw_adc_init(void)143 int rt_hw_adc_init(void)
144 {
145 #if defined(BSP_USING_ADC1)
146 rt_hw_adc_register(&mm32_adc1_config.mm32_adc_device, mm32_adc1_config.name, &mm32_adc_ops, mm32_adc1_config.adc_x);
147 #endif /* BSP_USING_ADC1 */
148
149 #if defined(BSP_USING_ADC2)
150 rt_hw_adc_register(&mm32_adc2_config.mm32_adc_device, mm32_adc2_config.name, &mm32_adc_ops, mm32_adc2_config.adc_x);
151 #endif /* BSP_USING_ADC2 */
152
153 return RT_EOK;
154 }
155 INIT_BOARD_EXPORT(rt_hw_adc_init);
156
157 #endif /* BSP_USING_ADC */
158