1 /*
2 * Copyright (c) 2022-2025, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2025-01-22 chasel first version
9 * 2025-02-10 chasel fix adc calibration did not clear flag bits
10 */
11 #include <rtdevice.h>
12 #include "board.h"
13 #include "drv_adc.h"
14 #include <hal_gpio.h>
15 #include <hal_adc.h>
16 #include <hal_rcc.h>
17 #include <hal_misc.h>
18
19 #if defined(BSP_USING_ADC)
20
21 struct mm32_adc
22 {
23 struct rt_adc_device mm32_adc_device;
24 ADC_TypeDef *adc_x;
25 char *name;
26 };
27
28 #if defined(BSP_USING_ADC1)
29 struct mm32_adc mm32_adc1_config = {
30 .adc_x = ADC1,
31 .name = "adc1",
32 };
33 #endif /* BSP_USING_ADC1 */
34
35 #if defined(BSP_USING_ADC2)
36 struct mm32_adc mm32_adc2_config = {
37 .adc_x = ADC2,
38 .name = "adc2",
39 };
40 #endif /* BSP_USING_ADC2 */
41
ADCxChannelEnable(ADC_TypeDef * ADCn,rt_uint32_t channel)42 static void ADCxChannelEnable(ADC_TypeDef* ADCn, rt_uint32_t channel)
43 {
44 ADCn->ADCHS &= ~(1 << channel);
45 ADCn->ADCHS |= (1 << channel);
46 }
47
mm32_adc_init(struct rt_adc_device * device,rt_int8_t channel,rt_bool_t enabled)48 static rt_err_t mm32_adc_init(struct rt_adc_device *device, rt_int8_t channel, rt_bool_t enabled)
49 {
50 ADC_InitTypeDef ADC_InitStruct;
51 ADC_TypeDef *adc_x;
52 RT_ASSERT(device != RT_NULL);
53 adc_x = device->parent.user_data;
54
55 if (enabled) {
56 mm32_msp_adc_init((void *)adc_x);
57
58 ADC_CalibrationConfig(adc_x, 0x1FE);
59
60 ADC_StructInit(&ADC_InitStruct);
61 ADC_InitStruct.ADC_Resolution = ADC_Resolution_12b;
62 ADC_InitStruct.ADC_Prescaler = ADC_Prescaler_16; //ADC prescale factor
63 ADC_InitStruct.ADC_Mode = ADC_Mode_Scan; //Set ADC mode to scan conversion mode
64 ADC_InitStruct.ADC_DataAlign = ADC_DataAlign_Right; //AD data right-justified
65 ADC_Init(adc_x, &ADC_InitStruct);
66
67 ADC_SampleTimeConfig(adc_x, channel, ADC_SampleTime_240_5);
68
69 ADC_ChannelCmd(adc_x, channel, ENABLE);
70
71 ADC_DifferentialConversionConfig(adc_x, ADC_Pseudo_Differential_Conversion_4_5);
72
73 ADC_Cmd(adc_x, ENABLE);
74 } else {
75 #if defined(BSP_USING_ADC1)
76 RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, DISABLE); //disable ADC1 clock
77 #endif /* BSP_USING_ADC1 */
78
79 #if defined(BSP_USING_ADC2)
80 RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, DISABLE); //disable ADC2 clock
81 #endif /* BSP_USING_ADC2 */
82
83 ADC_DeInit(adc_x);
84 ADC_Cmd(adc_x, DISABLE);
85 }
86
87 return RT_EOK;
88 }
89
mm32_get_adc_value(struct rt_adc_device * device,rt_int8_t channel,rt_uint32_t * value)90 static rt_err_t mm32_get_adc_value(struct rt_adc_device *device, rt_int8_t channel, rt_uint32_t *value)
91 {
92 ADC_TypeDef *adc_x;
93 RT_ASSERT(device != RT_NULL);
94 adc_x = device->parent.user_data;
95
96 ADC_SoftwareStartConvCmd(adc_x, ENABLE);
97
98 while(ADC_GetFlagStatus(adc_x, ADC_FLAG_EOC) == 0);
99 ADC_ClearFlag(adc_x, ADC_FLAG_EOC);
100
101 *value = ADC_GetChannelConvertedValue(adc_x, channel);
102 return RT_EOK;
103 }
104
mm32_adc_get_resolution(struct rt_adc_device * device)105 static rt_uint8_t mm32_adc_get_resolution(struct rt_adc_device *device)
106 {
107 ADC_TypeDef *adc_x = device->parent.user_data;
108
109 RT_ASSERT(device != RT_NULL);
110
111 switch( ((adc_x->ADCFG)&(0x00000380)) )
112 {
113 case ADC_Resolution_12b:
114 return 12;
115 case ADC_Resolution_11b:
116 return 11;
117 case ADC_Resolution_10b:
118 return 10;
119 case ADC_Resolution_9b:
120 return 9;
121 case ADC_Resolution_8b:
122 return 8;
123 default:
124 return 12;
125 }
126 }
127
mm32_adc_get_vref(struct rt_adc_device * device)128 static rt_int16_t mm32_adc_get_vref(struct rt_adc_device *device)
129 {
130 if(device == RT_NULL)
131 return -RT_ERROR;
132
133 return 3300;
134 }
135
136 static const struct rt_adc_ops mm32_adc_ops =
137 {
138 .enabled = mm32_adc_init,
139 .convert = mm32_get_adc_value,
140 .get_resolution = mm32_adc_get_resolution,
141 .get_vref = mm32_adc_get_vref,
142 };
143
rt_hw_adc_init(void)144 int rt_hw_adc_init(void)
145 {
146 #if defined(BSP_USING_ADC1)
147 rt_hw_adc_register(&mm32_adc1_config.mm32_adc_device, mm32_adc1_config.name, &mm32_adc_ops, mm32_adc1_config.adc_x);
148 #endif /* BSP_USING_ADC1 */
149
150 #if defined(BSP_USING_ADC2)
151 rt_hw_adc_register(&mm32_adc2_config.mm32_adc_device, mm32_adc2_config.name, &mm32_adc_ops, mm32_adc2_config.adc_x);
152 #endif /* BSP_USING_ADC2 */
153
154 return RT_EOK;
155 }
156 INIT_BOARD_EXPORT(rt_hw_adc_init);
157
158 #endif /* BSP_USING_ADC */
159