1 /**
2 ******************************************************************************
3 * @file  HAL_adc.h
4 * @author  AE Team
5 * @version  V2.0.0
6 * @date  22/08/2017
7 * @brief  This file contains all the functions prototypes for the ADC firmware
8 *         library.
9 ******************************************************************************
10 * @copy
11 *
12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 * TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 *
19 * <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
20 */
21 
22 /* Define to prevent recursive inclusion -------------------------------------*/
23 #ifndef __HAL_ADC_H
24 #define __HAL_ADC_H
25 
26 /* Includes ------------------------------------------------------------------*/
27 #include "HAL_device.h"
28 
29 /** @addtogroup StdPeriph_Driver
30 * @{
31 */
32 
33 /** @addtogroup ADC
34 * @{
35 */
36 
37 /** @defgroup ADC_Exported_Types
38 * @{
39 */
40 
41 /**
42 * @brief  ADC Init structure definition
43 */
44 
45 /*
46 typedef struct
47 {
48 uint32_t ADC_Mode;
49 FunctionalState ADC_ScanConvMode;
50 FunctionalState ADC_ContinuousConvMode;
51 uint32_t ADC_ExternalTrigConv;
52 uint32_t ADC_DataAlign;
53 uint8_t ADC_NbrOfChannel;
54 }ADC_InitTypeDef;
55 */
56 typedef struct
57 {
58     uint32_t ADC_Resolution;
59     uint32_t ADC_PRESCARE;
60     uint32_t ADC_Mode;
61     FunctionalState ADC_ContinuousConvMode;
62     uint32_t ADC_TRGEN;
63     uint32_t ADC_ExternalTrigConv;
64     uint32_t ADC_DataAlign;
65 }ADC_InitTypeDef;
66 /**
67 * @}
68 */
69 
70 /** @defgroup ADC_Exported_Constants
71 * @{
72 */
73 
74 #define IS_ADC_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \
75 ((*(uint32_t*)&(PERIPH)) == ADC2_BASE))
76 
77 #define IS_ADC_DMA_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \
78 ((*(uint32_t*)&(PERIPH)) == ADC2_BASE))
79 
80 /** @defgroup ADC_Resolution
81 * @{
82 */
83 #define ADC_Resolution_12b                         ((uint32_t)0x00000000)
84 #define ADC_Resolution_11b                         ((uint32_t)0x00000080)
85 #define ADC_Resolution_10b                         ((uint32_t)0x00000100)
86 #define ADC_Resolution_9b                          ((uint32_t)0x00000180)
87 #define ADC_Resolution_8b                          ((uint32_t)0x00000200)
88 
89 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_Resolution_12b) || \
90 ((RESOLUTION) == ADC_Resolution_10b) || \
91     ((RESOLUTION) == ADC_Resolution_8b) || \
92         ((RESOLUTION) == ADC_Resolution_6b))
93 
94 /**
95 * @brief  for ADC1, ADC2
96 */
97 
98 #define ADC_PCLK2_PRESCARE_2						 ((uint32_t)0x00000000)
99 #define ADC_PCLK2_PRESCARE_4						 ((uint32_t)0x00000010)
100 #define ADC_PCLK2_PRESCARE_6						 ((uint32_t)0x00000020)
101 #define ADC_PCLK2_PRESCARE_8						 ((uint32_t)0x00000030)
102 #define ADC_PCLK2_PRESCARE_10						 ((uint32_t)0x00000040)
103 #define ADC_PCLK2_PRESCARE_12						 ((uint32_t)0x00000050)
104 #define ADC_PCLK2_PRESCARE_14						 ((uint32_t)0x00000060)
105 #define ADC_PCLK2_PRESCARE_16						 ((uint32_t)0x00000070)
106 
107 
108 
109 /** @defgroup ADC_dual_mode
110 * @{
111 */
112 
113 #define ADC_Mode_Single                     ((uint32_t)0x00000000)
114 #define ADC_Mode_Single_Period              ((uint32_t)0x00000200)
115 #define ADC_Mode_Continuous_Scan            ((uint32_t)0x00000400)
116 
117 #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Single) || \
118 ((MODE) == ADC_Mode_Single_Period) || \
119     ((MODE) == ADC_Mode_Continuous_Scan))
120 /**
121 * @}
122 */
123 
124 #define ADC_TRG_Disable   ((uint32_t)0xfffffffB)
125 #define ADC_TRG_Enable    ((uint32_t)0x00000004)
126 
127 /** @defgroup ADC_extrenal_trigger_sources_for_regular_channels_conversion
128 * @{
129 */
130 
131 /**
132 * @brief  for ADC1
133 */
134 
135 #define ADC_ExternalTrigConv_T1_CC1         	((uint32_t)0x00000000)
136 #define ADC_ExternalTrigConv_T1_CC2   			  ((uint32_t)0x00000010)
137 #define ADC_ExternalTrigConv_T1_CC3     		  ((uint32_t)0x00000020)
138 #define ADC_ExternalTrigConv_T2_CC2  			    ((uint32_t)0x00000030)
139 #define ADC_ExternalTrigConv_T3_TRGO      		((uint32_t)0x00000040)
140 #define ADC_ExternalTrigConv_T3_CC1      		  ((uint32_t)0x00000060)
141 #define ADC_ExternalTrigConv_EXTI_11     	    ((uint32_t)0x00000070)
142 
143 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \
144 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \
145     ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \
146         ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
147             ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
148                 ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
149                     ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
150                         ((REGTRIG) == ADC_ExternalTrigConv_EXTI_11) || \
151                             ((REGTRIG) == ADC_ExternalTrigConv_T1_TRGO) || \
152                                 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC4) || \
153                                     ((REGTRIG) == ADC_ExternalTrigConv_T2_TRGO) || \
154                                         ((REGTRIG) == ADC_ExternalTrigConv_T2_CC1) || \
155                                             ((REGTRIG) == ADC_ExternalTrigConv_T3_CC4) || \
156                                                 ((REGTRIG) == ADC_ExternalTrigConv_T4_TRGO) || \
157                                                     ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
158                                                         ((REGTRIG) == ADC_ExternalTrigConv_EXTI_15))
159 /**
160 * @}
161 */
162 
163 /** @defgroup ADC_data_align
164 * @{
165 */
166 
167 #define ADC_DataAlign_Right                        ((uint32_t)0x00000000)
168 #define ADC_DataAlign_Left                         ((uint32_t)0x00000800)
169 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
170 ((ALIGN) == ADC_DataAlign_Left))
171 /**
172 * @}
173 */
174 
175 /** @defgroup ADC_channels
176 * @{
177 */
178 
179 #define ADC_Channel_0                               ((uint8_t)0x00)
180 #define ADC_Channel_1                               ((uint8_t)0x01)
181 #define ADC_Channel_2                               ((uint8_t)0x02)
182 #define ADC_Channel_3                               ((uint8_t)0x03)
183 #define ADC_Channel_4                               ((uint8_t)0x04)
184 #define ADC_Channel_5                               ((uint8_t)0x05)
185 #define ADC_Channel_6                               ((uint8_t)0x06)
186 #define ADC_Channel_7                               ((uint8_t)0x07)
187 #define ADC_Channel_8                               ((uint8_t)0x08)
188 #define ADC_Channel_9                               ((uint8_t)0x09)
189 #define ADC_Channel_10                              ((uint8_t)0x0A) //tempsensor
190 #define ADC_Channel_11                              ((uint8_t)0x0B)//vref 1.2V
191 #define ADC_Channel_All															((uint8_t)0x0f)
192 
193 
194 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \
195 ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \
196     ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \
197         ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \
198             ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_All))
199 
200 
201 
202 /** @defgroup ADC_sampling_times
203 * @{
204 */
205 
206 #define ADC_SampleTime_1_5Cycles                     ((uint8_t)0x00)
207 #define ADC_SampleTime_7_5Cycles                     ((uint8_t)0x01)
208 #define ADC_SampleTime_13_5Cycles                    ((uint8_t)0x02)
209 #define ADC_SampleTime_28_5Cycles                    ((uint8_t)0x03)
210 #define ADC_SampleTime_41_5Cycles                    ((uint8_t)0x04)
211 #define ADC_SampleTime_55_5Cycles                    ((uint8_t)0x05)
212 #define ADC_SampleTime_71_5Cycles                    ((uint8_t)0x06)
213 #define ADC_SampleTime_239_5Cycles                   ((uint8_t)0x07)
214 
215 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1_5Cycles)   || \
216 ((TIME) == ADC_SampleTime_7_5Cycles)   || \
217     ((TIME) == ADC_SampleTime_13_5Cycles)  || \
218         ((TIME) == ADC_SampleTime_28_5Cycles)  || \
219             ((TIME) == ADC_SampleTime_41_5Cycles)  || \
220                 ((TIME) == ADC_SampleTime_55_5Cycles)  || \
221                     ((TIME) == ADC_SampleTime_71_5Cycles)  || \
222                         ((TIME) == ADC_SampleTime_239_5Cycles))
223 
224 
225 
226 
227 /** @defgroup ADC_analog_watchdog_selection
228 * @{
229 */
230 
231 #define ADC_AnalogWatchdog_SingleRegEnable         ((uint32_t)0x00000002)
232 #define ADC_AnalogWatchdog_None                    ((uint32_t)0x00000000)
233 
234 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
235 ((WATCHDOG) == ADC_AnalogWatchdog_None))
236 /**
237 * @}
238 */
239 
240 /** @defgroup ADC_interrupts_definition
241 * @{
242 */
243 
244 #define ADC_IT_EOC                                 ((uint16_t)0x0001)
245 #define ADC_IT_AWD                                 ((uint16_t)0x0002)
246 
247 #define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xFFFC) == 0x00) && ((IT) != 0x00))
248 
249 #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD))
250 
251 /**
252 * @}
253 */
254 
255 /** @defgroup ADC_flags_definition
256 * @{
257 */
258 
259 #define ADC_FLAG_AWD                               ((uint8_t)0x02) //ADWIF �Ƚϱ�־λ
260 #define ADC_FLAG_EOC                               ((uint8_t)0x01) //ADIF  ת��������־λ
261 #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xF0) == 0x00) && ((FLAG) != 0x00))
262 #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC))
263 
264 /**
265 * @}
266 */
267 
268 
269 /** @defgroup ADC_Exported_Functions
270 * @{
271 */
272 
273 void ADC_DeInit(ADC_TypeDef* ADCx);
274 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
275 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
276 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
277 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
278 void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState);
279 void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
280 FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx);
281 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
282 void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
283 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
284 void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv);
285 void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
286 void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
287 
288 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx,FunctionalState NewState);
289 void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold);
290 void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
291 void ADC_TempSensorCmd(FunctionalState NewState);
292 void ADC_VrefintCmd(FunctionalState NewState);
293 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
294 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
295 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT);
296 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT);
297 
298 #endif /*__HAL_ADC_H */
299 
300 /**
301 * @}
302 */
303 
304 /**
305 * @}
306 */
307 
308 /**
309 * @}
310 */
311 
312 /*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
313