1 /**
2 ******************************************************************************
3 * @file    HAL_spi.h
4 * @author  AE Team
5 * @version V1.0.0
6 * @date    28/05/2015
7 * @brief   This file contains all the functions prototypes for the SPI firmware
8 *          library.
9 ******************************************************************************
10 * @copy
11 *
12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 * TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 *
19 * <h2><center>&copy; COPYRIGHT 2015 MindMotion</center></h2>
20 */
21 
22 /* Define to prevent recursive inclusion -------------------------------------*/
23 #ifndef __HAL_SPI_H
24 #define __HAL_SPI_H
25 
26 /* Includes ------------------------------------------------------------------*/
27 #include "HAL_device.h"
28 
29 /** @addtogroup StdPeriph_Driver
30 * @{
31 */
32 
33 /** @addtogroup SPI
34 * @{
35 */
36 
37 /** @defgroup SPI_Exported_Types
38 * @{
39 */
40 
41 /**
42 * @brief  SPI Init structure definition
43 */
44 
45 typedef struct
46 {
47   uint16_t SPI_Mode;
48   uint16_t SPI_DataSize;
49   uint16_t SPI_DataWidth;
50   uint16_t SPI_CPOL;
51   uint16_t SPI_CPHA;
52   uint16_t SPI_NSS;
53   uint16_t SPI_BaudRatePrescaler;
54   uint16_t SPI_FirstBit;
55 }SPI_InitTypeDef;
56 
57 
58 /**
59 * @}
60 */
61 
62 /** @defgroup SPI_Exported_Constants
63 * @{
64 */
65 
66 #define IS_SPI_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == SPI0_BASE) || \
67 ((*(uint32_t*)&(PERIPH)) == SPI1_BASE))
68 
69 #define IS_SPI_2_PERIPH(PERIPH) ((*(uint32_t*)&(PERIPH)) == SPI1_BASE)
70 
71 
72 /**
73 * @}
74 */
75 
76 /** @defgroup SPI_master_slave_mode
77 * @{
78 */
79 
80 #define SPI_Mode_Master                 ((uint16_t)0x0004)
81 #define SPI_Mode_Slave                  ((uint16_t)0x0000)
82 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
83 ((MODE) == SPI_Mode_Slave))
84 /**
85 * @}
86 */
87 
88 /** @defgroup SPI_data_size
89 * @{
90 */
91 
92 #define SPI_DataSize_32b                ((uint16_t)0x0800)
93 #define SPI_DataSize_8b                 ((uint16_t)0x0000)
94 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_32b) || \
95 ((DATASIZE) == SPI_DataSize_8b))
96 
97 /**
98 * @}
99 */
100 
101 
102 /** @defgroup SPI_7bit_8bit data width
103 * @{
104 */
105 
106 #define SPI_DataWidth_1b                  ((uint16_t)0x0001)
107 #define SPI_DataWidth_2b                  ((uint16_t)0x0002)
108 #define SPI_DataWidth_3b                  ((uint16_t)0x0003)
109 #define SPI_DataWidth_4b                  ((uint16_t)0x0004)
110 #define SPI_DataWidth_5b                  ((uint16_t)0x0005)
111 #define SPI_DataWidth_6b                  ((uint16_t)0x0006)
112 #define SPI_DataWidth_7b                  ((uint16_t)0x0007)
113 #define SPI_DataWidth_8b                  ((uint16_t)0x0008)
114 #define SPI_DataWidth_9b                  ((uint16_t)0x0009)
115 #define SPI_DataWidth_10b                 ((uint16_t)0x000a)
116 #define SPI_DataWidth_11b                 ((uint16_t)0x000b)
117 #define SPI_DataWidth_12b                 ((uint16_t)0x000c)
118 #define SPI_DataWidth_13b                 ((uint16_t)0x000d)
119 #define SPI_DataWidth_14b                 ((uint16_t)0x000e)
120 #define SPI_DataWidth_15b                 ((uint16_t)0x000f)
121 #define SPI_DataWidth_16b                 ((uint16_t)0x0010)
122 #define SPI_DataWidth_17b                 ((uint16_t)0x0011)
123 #define SPI_DataWidth_18b                 ((uint16_t)0x0012)
124 #define SPI_DataWidth_19b                 ((uint16_t)0x0013)
125 #define SPI_DataWidth_20b                 ((uint16_t)0x0014)
126 #define SPI_DataWidth_21b                 ((uint16_t)0x0015)
127 #define SPI_DataWidth_22b                 ((uint16_t)0x0016)
128 #define SPI_DataWidth_23b                 ((uint16_t)0x0017)
129 #define SPI_DataWidth_24b                 ((uint16_t)0x0018)
130 #define SPI_DataWidth_25b                 ((uint16_t)0x0019)
131 #define SPI_DataWidth_26b                 ((uint16_t)0x001a)
132 #define SPI_DataWidth_27b                 ((uint16_t)0x001b)
133 #define SPI_DataWidth_28b                 ((uint16_t)0x001c)
134 #define SPI_DataWidth_29b                 ((uint16_t)0x001d)
135 #define SPI_DataWidth_30b                 ((uint16_t)0x001e)
136 #define SPI_DataWidth_31b                 ((uint16_t)0x001f)
137 #define SPI_DataWidth_32b                 ((uint16_t)0x0000)
138 #define IS_SPI_DATAWIDRH(WIDTH) (((WIDTH) == SPI_DataWidth_1b) || ((WIDTH) == SPI_DataWidth_2b)||\
139 ((WIDTH) == SPI_DataWidth_3b)||((WIDTH) == SPI_DataWidth_4b)||\
140   ((WIDTH) == SPI_DataWidth_5b)||((WIDTH) == SPI_DataWidth_6b)||\
141     ((WIDTH) == SPI_DataWidth_7b)||((WIDTH) == SPI_DataWidth_8b)||\
142       ((WIDTH) == SPI_DataWidth_9b)||((WIDTH) == SPI_DataWidth_10b)||\
143         ((WIDTH) == SPI_DataWidth_11b)||((WIDTH) == SPI_DataWidth_12b)||\
144           ((WIDTH) == SPI_DataWidth_13b)||((WIDTH) == SPI_DataWidth_14b)||\
145             ((WIDTH) == SPI_DataWidth_15b)||((WIDTH) == SPI_DataWidth_16b)||\
146               ((WIDTH) == SPI_DataWidth_17b)||((WIDTH) == SPI_DataWidth_18b)||\
147                 ((WIDTH) == SPI_DataWidth_19b)||((WIDTH) == SPI_DataWidth_20b)||\
148                   ((WIDTH) == SPI_DataWidth_21b)||((WIDTH) == SPI_DataWidth_22b)||\
149                     ((WIDTH) == SPI_DataWidth_23b)||((WIDTH) == SPI_DataWidth_24b)||\
150                       ((WIDTH) == SPI_DataWidth_25b)||((WIDTH) == SPI_DataWidth_26b)||\
151                         ((WIDTH) == SPI_DataWidth_27b)||((WIDTH) == SPI_DataWidth_28b)||\
152                           ((WIDTH) == SPI_DataWidth_29b)||((WIDTH) == SPI_DataWidth_30b)||\
153                             ((WIDTH) == SPI_DataWidth_31b)||((WIDTH) == SPI_DataWidth_32b)||)
154 /**
155 * @}
156 */
157 
158 
159 /** @defgroup SPI_Clock_Polarity
160 * @{
161 */
162 
163 #define SPI_CPOL_Low                    ((uint16_t)0x0000)
164 #define SPI_CPOL_High                   ((uint16_t)0x0002)
165 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
166 ((CPOL) == SPI_CPOL_High))
167 /**
168 * @}
169 */
170 
171 /** @defgroup SPI_Clock_Phase
172 * @{
173 */
174 
175 #define SPI_CPHA_1Edge                  ((uint16_t)0x0001)
176 #define SPI_CPHA_2Edge                  ((uint16_t)0x0000)
177 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
178 ((CPHA) == SPI_CPHA_2Edge))
179 /**
180 * @}
181 */
182 
183 /** @defgroup SPI_Slave_Select_management
184 * @{
185 */
186 
187 #define SPI_NSS_Soft                    ((uint16_t)0x0000)
188 #define SPI_NSS_Hard                    ((uint16_t)0x0400)
189 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
190 ((NSS) == SPI_NSS_Hard))
191 
192 
193 /**
194 * @}
195 */
196 
197 /** @defgroup SPI_NSS_internal_software_mangement
198 * @{
199 */
200 
201 #define SPI_NSSInternalSoft_Set         ((uint16_t)0x0001)
202 #define SPI_NSSInternalSoft_Reset       ((uint16_t)0xFFFE)
203 #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
204 ((INTERNAL) == SPI_NSSInternalSoft_Reset))
205 /**
206 * @}
207 */
208 
209 /**
210 * @}
211 */
212 
213 /** @defgroup SPI_BaudRate_Prescaler_
214 * @{
215 */
216 
217 
218 #define SPI_BaudRatePrescaler_2         ((uint16_t)0x0002)
219 #define SPI_BaudRatePrescaler_4         ((uint16_t)0x0004)
220 #define SPI_BaudRatePrescaler_8         ((uint16_t)0x0008)
221 #define SPI_BaudRatePrescaler_16        ((uint16_t)0x0010)
222 #define SPI_BaudRatePrescaler_32        ((uint16_t)0x0020)
223 #define SPI_BaudRatePrescaler_64        ((uint16_t)0x0040)
224 #define SPI_BaudRatePrescaler_128       ((uint16_t)0x0080)
225 #define SPI_BaudRatePrescaler_256       ((uint16_t)0x0100)
226 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
227 ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
228   ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
229     ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
230       ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
231         ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
232           ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
233             ((PRESCALER) == SPI_BaudRatePrescaler_256))
234 /**
235 * @}
236 */
237 
238 /** @defgroup SPI_MSB_LSB_transmission
239 * @{
240 */
241 
242 #define SPI_FirstBit_MSB                ((uint16_t)0x0000)
243 #define SPI_FirstBit_LSB                ((uint16_t)0x0004)
244 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
245 ((BIT) == SPI_FirstBit_LSB))
246 
247 
248 /**
249 * @}
250 */
251 
252 /** @defgroup SPI_DMA_transfer_requests
253 * @{
254 */
255 
256 #define SPI_DMAReq_EN               		((uint16_t)0x0200)
257 #define IS_SPI_DMAREQ(DMAREQ) ((DMAREQ)  == SPI_DMAReq_EN)
258 
259 
260 /**
261 * @}
262 */
263 
264 /** @defgroup SPI TX Fifo and RX Fifo trigger level
265 * @{
266 */
267 #define SPI_TXTLF               		    ((uint16_t)0x0080)
268 #define SPI_RXTLF               		    ((uint16_t)0x0020)
269 #define IS_SPI_FIFOTRIGGER(TRIGGER) (((TRIGGER)  == SPI_TXTLF) && ((TRIGGER) == SPI_RXTLF))
270 
271 
272 
273 
274 
275 
276 
277 /**
278 * @}
279 */
280 
281 /** @defgroup SPI_NSS_internal_software_mangement
282 * @{
283 */
284 
285 #define SPI_CS_BIT0                   ((uint16_t)0xfffe)
286 #define SPI_CS_BIT1                   ((uint16_t)0xfffd)
287 #define SPI_CS_BIT2                   ((uint16_t)0xfffb)
288 #define SPI_CS_BIT3                   ((uint16_t)0xfff7)
289 #define SPI_CS_BIT4                   ((uint16_t)0xffef)
290 #define SPI_CS_BIT5                   ((uint16_t)0xffdf)
291 #define SPI_CS_BIT6                   ((uint16_t)0xffbf)
292 #define SPI_CS_BIT7                   ((uint16_t)0xff7f)
293 #define IS_SPI_CS(CS)        (((CS) == SPI_CS_BIT0) || ((CS) == SPI_CS_BIT1)||\
294 ((CS) == SPI_CS_BIT2) || ((CS) == SPI_CS_BIT3)||\
295   ((CS) == SPI_CS_BIT4) || ((CS) == SPI_CS_BIT5)||\
296     ((CS) == SPI_CS_BIT6) || ((CS) == SPI_CS_BIT7))
297 /**
298 * @}
299 */
300 
301 
302 /** @defgroup SPI_direction_transmit_receive
303 * @{
304 */
305 
306 #define SPI_Direction_Rx                ((uint16_t)0x0010)
307 #define SPI_Direction_Tx                ((uint16_t)0x0008)
308 #define SPI_Disable_Tx                	((uint16_t)0xfff7)
309 #define SPI_Disable_Rx                	((uint16_t)0xffef)
310 #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
311 ((DIRECTION) == SPI_Direction_Tx) || \
312   ((DIRECTION) == SPI_Disable_Tx) || \
313     ((DIRECTION) == SPI_Disable_Rx))
314 /**
315 * @}
316 */
317 
318 /** @defgroup SPI_interrupts_definition
319 * @{
320 */
321 #define SPI_INT_EN                    ((uint16_t)0x0002)
322 
323 #define SPI_IT_TX                     ((uint8_t)0x01)
324 #define SPI_IT_RX                     ((uint8_t)0x02)
325 
326 #define IS_SPI_CONFIG_IT(IT) (((IT) == SPI_IT_TX) || \
327 ((IT) == SPI_IT_RX))
328 
329 #define SPI_IT_UNDERRUN                ((uint8_t)0x04)
330 #define SPI_IT_RXOVER                  ((uint8_t)0x08)
331 #define SPI_IT_RXMATCH                 ((uint8_t)0x10)
332 #define SPI_IT_RXFULL                  ((uint8_t)0x20)
333 #define SPI_IT_TXEPT                   ((uint8_t)0x40)
334 
335 #define IS_SPI_GET_IT(IT) (((IT) == SPI_IT_TX) || ((IT) == SPI_IT_RX) || \
336 ((IT) == SPI_IT_UNDERRUN) || ((IT) == SPI_IT_RXOVER) || \
337   ((IT) == SPI_IT_RXMATCH) || ((IT) == SPI_IT_RXFULL) || \
338     ((IT) == SPI_IT_TXEPT))
339 /**
340 * @}
341 */
342 
343 /** @defgroup SPI_flags_definition
344 * @{
345 */
346 
347 
348 #define SPI_FLAG_RXAVL                ((uint16_t)0x0002)
349 #define SPI_FLAG_TXEPT                ((uint16_t)0x0001)
350 
351 #define IS_SPI_GET_FLAG(FLAG) (((FLAG) == SPI_FLAG_RXAVL) || \
352 ((FLAG) == SPI_FLAG_TXEPT))
353 
354 /**
355 * @}
356 */
357 
358 /** @defgroup SPI mode tx data transmit phase adjust set
359 *in slave mode according to txedge bit of CCTL register
360 * @{
361 */
362 
363 
364 #define SPI_SlaveAdjust_FAST          ((uint16_t)0x0020)
365 #define SPI_SlaveAdjust_LOW           ((uint16_t)0xffdf)
366 
367 #define IS_SPI_SlaveAdjust(ADJUST) (((ADJUST) == SPI_SlaveAdjust_FAST) || \
368 ((ADJUST) == SPI_SlaveAdjust_LOW))
369 
370 
371 /**
372 * @}
373 */
374 
375 /** @defgroup SPI_Exported_Macros
376 * @{
377 */
378 
379 /**
380 * @}
381 */
382 
383 /** @defgroup SPI_Exported_Functions
384 * @{
385 */
386 
387 void SPI_DeInit(SPI_TypeDef* SPIx);
388 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
389 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
390 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
391 void SPI_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_IT, FunctionalState NewState);
392 void SPI_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_DMAReq, FunctionalState NewState);
393 void SPI_FifoTrigger(SPI_TypeDef* SPIx, uint16_t SPI_FifoTriggerValue, FunctionalState NewState);
394 void SPI_SendData(SPI_TypeDef* SPIx, uint32_t Data);
395 uint32_t SPI_ReceiveData(SPI_TypeDef* SPIx);
396 void SPI_CSInternalSelected(SPI_TypeDef* SPIx, uint16_t SPI_CSInternalSelected,FunctionalState NewState);
397 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
398 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
399 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
400 FlagStatus SPI_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_FLAG);
401 ITStatus SPI_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_IT);
402 void SPI_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_IT);
403 void SPI_RxBytes(SPI_TypeDef* SPIx, uint16_t Number);
404 void SPI_SlaveAdjust(SPI_TypeDef* SPIx, uint16_t AdjustValue);
405 #endif /*__HAL_SPI_H */
406 /**
407 * @}
408 */
409 
410 /**
411 * @}
412 */
413 
414 /**
415 * @}
416 */
417 
418 /*-------------------------(C) COPYRIGHT 2015 MindMotion ----------------------*/
419