1 /**
2 ******************************************************************************
3 * @file HAL_dac.c
4 * @author AE Team
5 * @version V1.0.0
6 * @date 28/7/2017
7 * @brief This file provides all the DAC firmware functions.
8 ******************************************************************************
9 * @copy
10 *
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 * TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 *
18 * <h2><center>© COPYRIGHT 2017 MindMotion</center></h2>
19 */
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "HAL_dac.h"
23 #include "HAL_rcc.h"
24
25 /** @addtogroup StdPeriph_Driver
26 * @{
27 */
28
29 /** @defgroup DAC
30 * @brief DAC driver modules
31 * @{
32 */
33
34 /** @defgroup DAC_Private_TypesDefinitions
35 * @{
36 */
37
38 /**
39 * @}
40 */
41
42 /** @defgroup DAC_Private_Defines
43 * @{
44 */
45
46 /* DAC EN mask */
47 #define CR_EN_Set ((uint32_t)0x00000001)
48
49 /* DAC DMAEN mask */
50 #define CR_DMAEN_Set ((uint32_t)0x00001000)
51
52 /* CR register Mask */
53 #define CR_CLEAR_Mask ((uint32_t)0x00000FFE)
54
55 /* DAC SWTRIG mask */
56 #define SWTRIGR_SWTRIG_Set ((uint32_t)0x00000001)
57
58 /* DAC Dual Channels SWTRIG masks */
59 #define DUAL_SWTRIG_Set ((uint32_t)0x00000003)
60 #define DUAL_SWTRIG_Reset ((uint32_t)0xFFFFFFFC)
61
62 /* DHR registers offsets */
63 #define DHR12R1_Offset ((uint32_t)0x00000008)
64 #define DHR12R2_Offset ((uint32_t)0x00000014)
65 #define DHR12RD_Offset ((uint32_t)0x00000020)
66
67 /* DOR register offset */
68 #define DOR_Offset ((uint32_t)0x0000002C)
69 /**
70 * @}
71 */
72
73 /** @defgroup DAC_Private_Macros
74 * @{
75 */
76
77 /**
78 * @}
79 */
80
81 /** @defgroup DAC_Private_Variables
82 * @{
83 */
84
85 /**
86 * @}
87 */
88
89 /** @defgroup DAC_Private_FunctionPrototypes
90 * @{
91 */
92
93 /**
94 * @}
95 */
96
97 /** @defgroup DAC_Private_Functions
98 * @{
99 */
100
101 /**
102 * @brief Deinitializes the DAC peripheral registers to their default
103 * reset values.
104 * @param None
105 * @retval : None
106 */
DAC_DeInit(void)107 void DAC_DeInit(void)
108 {
109 /* Enable DAC reset state */
110 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE);
111 /* Release DAC from reset state */
112 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE);
113 }
114
115 /**
116 * @brief Initializes the DAC peripheral according to the specified
117 * parameters in the DAC_InitStruct.
118 * @param DAC_Channel: the selected DAC channel.
119 * This parameter can be one of the following values:
120 * @arg DAC_Channel_1: DAC Channel1 selected
121 * @arg DAC_Channel_2: DAC Channel2 selected
122 * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that
123 * contains the configuration information for the specified
124 * DAC channel.
125 * @retval : None
126 */
DAC_Init(uint32_t DAC_Channel,DAC_InitTypeDef * DAC_InitStruct)127 void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct)
128 {
129 uint32_t tmpreg1 = 0, tmpreg2 = 0;
130 /* Check the DAC parameters */
131 assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger));
132 assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration));
133 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude));
134 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(DAC_InitStruct->DAC_OutputBuffer));
135 /*---------------------------- DAC CR Configuration --------------------------*/
136 /* Get the DAC CR value */
137 tmpreg1 = DAC->CR;
138 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
139 tmpreg1 &= ~(CR_CLEAR_Mask << DAC_Channel);
140 /* Configure for the selected DAC channel: buffer output, trigger, wave genration,
141 mask/amplitude for wave genration */
142 /* Set TSELx and TENx bits according to DAC_Trigger value */
143 /* Set WAVEx bits according to DAC_WaveGeneration value */
144 /* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */
145 /* Set BOFFx bit according to DAC_OutputBuffer value */
146 tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration |
147 DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_OutputBuffer);
148 /* Calculate CR register value depending on DAC_Channel */
149 tmpreg1 |= (tmpreg2 << DAC_Channel);
150 /* Write to DAC CR */
151 DAC->CR = tmpreg1;
152 }
153
154 /**
155 * @brief Fills each DAC_InitStruct member with its default value.
156 * @param DAC_InitStruct : pointer to a DAC_InitTypeDef structure
157 * which will be initialized.
158 * @retval : None
159 */
DAC_StructInit(DAC_InitTypeDef * DAC_InitStruct)160 void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct)
161 {
162 /*--------------- Reset DAC init structure parameters values -----------------*/
163 /* Initialize the DAC_Trigger member */
164 DAC_InitStruct->DAC_Trigger = DAC_Trigger_None;
165 /* Initialize the DAC_WaveGeneration member */
166 DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None;
167 /* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */
168 DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0;
169 /* Initialize the DAC_OutputBuffer member */
170 DAC_InitStruct->DAC_OutputBuffer = DAC_OutputBuffer_Enable;
171 }
172
173 /**
174 * @brief Enables or disables the specified DAC channel.
175 * @param DAC_Channel: the selected DAC channel.
176 * This parameter can be one of the following values:
177 * @arg DAC_Channel_1: DAC Channel1 selected
178 * @arg DAC_Channel_2: DAC Channel2 selected
179 * @param NewState: new state of the DAC channel.
180 * This parameter can be: ENABLE or DISABLE.
181 * @retval : None
182 */
DAC_Cmd(uint32_t DAC_Channel,FunctionalState NewState)183 void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState)
184 {
185 /* Check the parameters */
186 assert_param(IS_DAC_CHANNEL(DAC_Channel));
187 assert_param(IS_FUNCTIONAL_STATE(NewState));
188 if (NewState != DISABLE)
189 {
190 /* Enable the selected DAC channel */
191 DAC->CR |= CR_EN_Set << DAC_Channel;
192 }
193 else
194 {
195 /* Disable the selected DAC channel */
196 DAC->CR &= ~(CR_EN_Set << DAC_Channel);
197 }
198 }
199
200 /**
201 * @brief Enables or disables the specified DAC channel DMA request.
202 * @param DAC_Channel: the selected DAC channel.
203 * This parameter can be one of the following values:
204 * @arg DAC_Channel_1: DAC Channel1 selected
205 * @arg DAC_Channel_2: DAC Channel2 selected
206 * @param NewState: new state of the selected DAC channel DMA request.
207 * This parameter can be: ENABLE or DISABLE.
208 * @retval : None
209 */
DAC_DMACmd(uint32_t DAC_Channel,FunctionalState NewState)210 void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState)
211 {
212 /* Check the parameters */
213 assert_param(IS_DAC_CHANNEL(DAC_Channel));
214 assert_param(IS_FUNCTIONAL_STATE(NewState));
215 if (NewState != DISABLE)
216 {
217 /* Enable the selected DAC channel DMA request */
218 DAC->CR |= CR_DMAEN_Set << DAC_Channel;
219 }
220 else
221 {
222 /* Disable the selected DAC channel DMA request */
223 DAC->CR &= ~(CR_DMAEN_Set << DAC_Channel);
224 }
225 }
226
227 /**
228 * @brief Enables or disables the selected DAC channel software trigger.
229 * @param DAC_Channel: the selected DAC channel.
230 * This parameter can be one of the following values:
231 * @arg DAC_Channel_1: DAC Channel1 selected
232 * @arg DAC_Channel_2: DAC Channel2 selected
233 * @param NewState: new state of the selected DAC channel software trigger.
234 * This parameter can be: ENABLE or DISABLE.
235 * @retval : None
236 */
DAC_SoftwareTriggerCmd(uint32_t DAC_Channel,FunctionalState NewState)237 void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState)
238 {
239 /* Check the parameters */
240 assert_param(IS_DAC_CHANNEL(DAC_Channel));
241 assert_param(IS_FUNCTIONAL_STATE(NewState));
242 if (NewState != DISABLE)
243 {
244 /* Enable software trigger for the selected DAC channel */
245 DAC->SWTRIGR |= SWTRIGR_SWTRIG_Set << (DAC_Channel >> 4);
246 }
247 else
248 {
249 /* Disable software trigger for the selected DAC channel */
250 DAC->SWTRIGR &= ~(SWTRIGR_SWTRIG_Set << (DAC_Channel >> 4));
251 }
252 }
253
254 /**
255 * @brief Enables or disables simultaneously the two DAC channels software
256 * triggers.
257 * @param NewState: new state of the DAC channels software triggers.
258 * This parameter can be: ENABLE or DISABLE.
259 * @retval : None
260 */
DAC_DualSoftwareTriggerCmd(FunctionalState NewState)261 void DAC_DualSoftwareTriggerCmd(FunctionalState NewState)
262 {
263 /* Check the parameters */
264 assert_param(IS_FUNCTIONAL_STATE(NewState));
265 if (NewState != DISABLE)
266 {
267 /* Enable software trigger for both DAC channels */
268 DAC->SWTRIGR |= DUAL_SWTRIG_Set ;
269 }
270 else
271 {
272 /* Disable software trigger for both DAC channels */
273 DAC->SWTRIGR &= DUAL_SWTRIG_Reset;
274 }
275 }
276
277 /**
278 * @brief Enables or disables the selected DAC channel wave generation.
279 * @param DAC_Channel: the selected DAC channel.
280 * This parameter can be one of the following values:
281 * @arg DAC_Channel_1: DAC Channel1 selected
282 * @arg DAC_Channel_2: DAC Channel2 selected
283 * @param DAC_Wave: Specifies the wave type to enable or disable.
284 * This parameter can be one of the following values:
285 * @arg DAC_Wave_Noise: noise wave generation
286 * @arg DAC_Wave_Triangle: triangle wave generation
287 * @param NewState: new state of the selected DAC channel wave generation.
288 * This parameter can be: ENABLE or DISABLE.
289 * @retval : None
290 */
DAC_WaveGenerationCmd(uint32_t DAC_Channel,uint32_t DAC_Wave,FunctionalState NewState)291 void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState)
292 {
293 /* Check the parameters */
294 assert_param(IS_DAC_CHANNEL(DAC_Channel));
295 assert_param(IS_DAC_WAVE(DAC_Wave));
296 assert_param(IS_FUNCTIONAL_STATE(NewState));
297 if (NewState != DISABLE)
298 {
299 /* Enable the selected wave generation for the selected DAC channel */
300 DAC->CR |= DAC_Wave << DAC_Channel;
301 }
302 else
303 {
304 /* Disable the selected wave generation for the selected DAC channel */
305 DAC->CR &= ~(DAC_Wave << DAC_Channel);
306 }
307 }
308
309 /**
310 * @brief Set the specified data holding register value for DAC channel1.
311 * @param DAC_Align: Specifies the data alignement for DAC channel1.
312 * This parameter can be one of the following values:
313 * @arg DAC_Align_8b_R: 8bit right data alignement selected
314 * @arg DAC_Align_12b_L: 12bit left data alignement selected
315 * @arg DAC_Align_12b_R: 12bit right data alignement selected
316 * @param Data : Data to be loaded in the selected data holding
317 * register.
318 * @retval : None
319 */
DAC_SetChannel1Data(uint32_t DAC_Align,uint16_t Data)320 void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data)
321 {
322 /* Check the parameters */
323 assert_param(IS_DAC_ALIGN(DAC_Align));
324 assert_param(IS_DAC_DATA(Data));
325 /* Set the DAC channel1 selected data holding register */
326 *((__IO uint32_t *)(DAC_BASE + DHR12R1_Offset + DAC_Align)) = (uint32_t)Data;
327 }
328
329 /**
330 * @brief Set the specified data holding register value for DAC channel2.
331 * @param DAC_Align: Specifies the data alignement for DAC channel2.
332 * This parameter can be one of the following values:
333 * @arg DAC_Align_8b_R: 8bit right data alignement selected
334 * @arg DAC_Align_12b_L: 12bit left data alignement selected
335 * @arg DAC_Align_12b_R: 12bit right data alignement selected
336 * @param Data : Data to be loaded in the selected data holding
337 * register.
338 * @retval : None
339 */
DAC_SetChannel2Data(uint32_t DAC_Align,uint16_t Data)340 void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data)
341 {
342 /* Check the parameters */
343 assert_param(IS_DAC_ALIGN(DAC_Align));
344 assert_param(IS_DAC_DATA(Data));
345 /* Set the DAC channel2 selected data holding register */
346 *((__IO uint32_t *)(DAC_BASE + DHR12R2_Offset + DAC_Align)) = (uint32_t)Data;
347 }
348
349 /**
350 * @brief Set the specified data holding register value for dual channel
351 * DAC.
352 * @param DAC_Align: Specifies the data alignement for dual channel DAC.
353 * This parameter can be one of the following values:
354 * @arg DAC_Align_8b_R: 8bit right data alignement selected
355 * @arg DAC_Align_12b_L: 12bit left data alignement selected
356 * @arg DAC_Align_12b_R: 12bit right data alignement selected
357 * @param Data2: Data for DAC Channel2 to be loaded in the selected data
358 * holding register.
359 * @param Data1: Data for DAC Channel1 to be loaded in the selected data
360 * holding register.
361 * @retval : None
362 */
DAC_SetDualChannelData(uint32_t DAC_Align,uint16_t Data2,uint16_t Data1)363 void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1)
364 {
365 uint32_t data = 0;
366 /* Check the parameters */
367 assert_param(IS_DAC_ALIGN(DAC_Align));
368 assert_param(IS_DAC_DATA(Data1));
369 assert_param(IS_DAC_DATA(Data2));
370
371 /* Calculate and set dual DAC data holding register value */
372 if (DAC_Align == DAC_Align_8b_R)
373 {
374 data = ((uint32_t)Data2 << 8) | Data1;
375 }
376 else
377 {
378 data = ((uint32_t)Data2 << 16) | Data1;
379 }
380 /* Set the dual DAC selected data holding register */
381 *((__IO uint32_t *)(DAC_BASE + DHR12RD_Offset + DAC_Align)) = data;
382 }
383
384 /**
385 * @brief Returns the last data output value of the selected DAC cahnnel.
386 * @param DAC_Channel: the selected DAC channel.
387 * This parameter can be one of the following values:
388 * @arg DAC_Channel_1: DAC Channel1 selected
389 * @arg DAC_Channel_2: DAC Channel2 selected
390 * @retval : The selected DAC channel data output value.
391 */
DAC_GetDataOutputValue(uint32_t DAC_Channel)392 uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel)
393 {
394 /* Check the parameters */
395 assert_param(IS_DAC_CHANNEL(DAC_Channel));
396 /* Returns the DAC channel data output register value */
397 return (uint16_t) (*(__IO uint32_t*)(DAC_BASE + DOR_Offset + ((uint32_t)DAC_Channel >> 2)));
398 }
399
400 /**
401 * @}
402 */
403
404 /**
405 * @}
406 */
407
408 /**
409 * @}
410 */
411
412 /*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
413