1 //*****************************************************************************
2 //
3 // crc.c - Driver for the CRC module.
4 //
5 // Copyright (c) 2012-2017 Texas Instruments Incorporated.  All rights reserved.
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36 //*****************************************************************************
37 
38 //*****************************************************************************
39 //
40 //! \addtogroup crc_api
41 //! @{
42 //
43 //*****************************************************************************
44 
45 #include <ti/devices/msp432e4/inc/msp432e411y.h>
46 #include "types.h"
47 #include <stdbool.h>
48 #include <stdint.h>
49 #include "inc/hw_ccm.h"
50 #include "crc.h"
51 #include "debug.h"
52 
53 //*****************************************************************************
54 //
55 //! Set the configuration of CRC functionality with the EC module.
56 //!
57 //! \param ui32Base is the base address of the EC module.
58 //! \param ui32CRCConfig is the configuration of the CRC engine.
59 //!
60 //! This function configures the operation of the CRC engine within the EC
61 //! module.  The configuration is specified with the \e ui32CRCConfig argument.
62 //! It is the logical OR of any of the following options:
63 //!
64 //! CRC Initialization Value
65 //! - \b CRC_CFG_INIT_SEED - Initialize with seed value
66 //! - \b CRC_CFG_INIT_0 - Initialize to all '0s'
67 //! - \b CRC_CFG_INIT_1 - Initialize to all '1s'
68 //!
69 //! Input Data Size
70 //! - \b CRC_CFG_SIZE_8BIT - Input data size of 8 bits
71 //! - \b CRC_CFG_SIZE_32BIT - Input data size of 32 bits
72 //!
73 //! Post Process Reverse/Inverse
74 //! - \b CRC_CFG_RESINV - Result inverse enable
75 //! - \b CRC_CFG_OBR - Output reverse enable
76 //!
77 //! Input Bit Reverse
78 //! - \b CRC_CFG_IBR - Bit reverse enable
79 //!
80 //! Endian Control
81 //! - \b CRC_CFG_ENDIAN_SBHW - Swap byte in half-word
82 //! - \b CRC_CFG_ENDIAN_SHW - Swap half-word
83 //!
84 //! Operation Type
85 //! - \b CRC_CFG_TYPE_P8005 - Polynomial 0x8005
86 //! - \b CRC_CFG_TYPE_P1021 - Polynomial 0x1021
87 //! - \b CRC_CFG_TYPE_P4C11DB7 - Polynomial 0x4C11DB7
88 //! - \b CRC_CFG_TYPE_P1EDC6F41 - Polynomial 0x1EDC6F41
89 //! - \b CRC_CFG_TYPE_TCPCHKSUM - TCP checksum
90 //!
91 //! \return None.
92 //
93 //*****************************************************************************
94 void
CRCConfigSet(uint32_t ui32Base,uint32_t ui32CRCConfig)95 CRCConfigSet(uint32_t ui32Base, uint32_t ui32CRCConfig)
96 {
97     //
98     // Check the arguments.
99     //
100     ASSERT(ui32Base == CCM0_BASE);
101     ASSERT((ui32CRCConfig & CRC_CFG_INIT_SEED) ||
102            (ui32CRCConfig & CRC_CFG_INIT_0) ||
103            (ui32CRCConfig & CRC_CFG_INIT_1) ||
104            (ui32CRCConfig & CRC_CFG_SIZE_8BIT) ||
105            (ui32CRCConfig & CRC_CFG_SIZE_32BIT) ||
106            (ui32CRCConfig & CRC_CFG_RESINV) ||
107            (ui32CRCConfig & CRC_CFG_OBR) ||
108            (ui32CRCConfig & CRC_CFG_IBR) ||
109            (ui32CRCConfig & CRC_CFG_ENDIAN_SBHW) ||
110            (ui32CRCConfig & CRC_CFG_ENDIAN_SHW) ||
111            (ui32CRCConfig & CRC_CFG_TYPE_P8005) ||
112            (ui32CRCConfig & CRC_CFG_TYPE_P1021) ||
113            (ui32CRCConfig & CRC_CFG_TYPE_P4C11DB7) ||
114            (ui32CRCConfig & CRC_CFG_TYPE_P1EDC6F41) ||
115            (ui32CRCConfig & CRC_CFG_TYPE_TCPCHKSUM));
116 
117     //
118     // Write the control register with the configuration.
119     //
120     HWREG(ui32Base + CCM_O_CRCCTRL) = ui32CRCConfig;
121 }
122 
123 //*****************************************************************************
124 //
125 //! Write the seed value for CRC operations in the EC module.
126 //!
127 //! \param ui32Base is the base address of the EC module.
128 //! \param ui32Seed is the seed value.
129 //!
130 //! This function writes the seed value for use with CRC operations in the
131 //! EC module.  This value is the start value for CRC operations.  If this
132 //! value is not written, then the residual seed from the previous operation
133 //! is used as the starting value.
134 //!
135 //! \note The seed must be written only if \b CRC_CFG_INIT_SEED is
136 //! set with the CRCConfigSet() function.
137 //
138 //*****************************************************************************
139 void
CRCSeedSet(uint32_t ui32Base,uint32_t ui32Seed)140 CRCSeedSet(uint32_t ui32Base, uint32_t ui32Seed)
141 {
142     //
143     // Check the arguments.
144     //
145     ASSERT(ui32Base == CCM0_BASE);
146 
147     //
148     // Write the seed value to the seed register.
149     //
150     HWREG(ui32Base + CCM_O_CRCSEED) = ui32Seed;
151 }
152 
153 //*****************************************************************************
154 //
155 //! Write data into the EC module for CRC operations.
156 //!
157 //! \param ui32Base is the base address of the EC module.
158 //! \param ui32Data is the data to be written.
159 //!
160 //! This function writes either 8 or 32 bits of data into the EC module for
161 //! CRC operations.  The distinction between 8 and 32 bits of data is made
162 //! when the \b CRC_CFG_SIZE_8BIT or \b CRC_CFG_SIZE_32BIT flag
163 //! is set using the CRCConfigSet() function.
164 //!
165 //! When writing 8 bits of data, ensure the data is in the least significant
166 //! byte position.  The remaining bytes should be written with zero.  For
167 //! example, when writing 0xAB, \e ui32Data should be 0x000000AB.
168 //!
169 //! \return None
170 //
171 //*****************************************************************************
172 void
CRCDataWrite(uint32_t ui32Base,uint32_t ui32Data)173 CRCDataWrite(uint32_t ui32Base, uint32_t ui32Data)
174 {
175     //
176     // Check the arguments.
177     //
178     ASSERT(ui32Base == CCM0_BASE);
179 
180     //
181     // Write the data
182     //
183     HWREG(ui32Base + CCM_O_CRCDIN) = ui32Data;
184 }
185 
186 //*****************************************************************************
187 //
188 //! Reads the result of a CRC operation in the EC module.
189 //!
190 //! \param ui32Base is the base address of the EC module.
191 //! \param bPPResult is \b true to read the post-processed result, or \b false
192 //! to read the unmodified result.
193 //!
194 //! This function reads either the unmodified CRC result or the post
195 //! processed CRC result from the EC module.  The post-processing options
196 //! are selectable through \b CRC_CFG_RESINV and \b CRC_CFG_OBR
197 //! parameters in the CRCConfigSet() function.
198 //!
199 //! \return The CRC result.
200 //
201 //*****************************************************************************
202 uint32_t
CRCResultRead(uint32_t ui32Base,bool bPPResult)203 CRCResultRead(uint32_t ui32Base, bool bPPResult)
204 {
205     //
206     // Check the arguments.
207     //
208     ASSERT(ui32Base == CCM0_BASE);
209 
210     //
211     // Depending on the value of bPPResult, read the appropriate register and
212     // return value.
213     //
214     if (bPPResult)
215     {
216         return (HWREG(ui32Base + CCM_O_CRCRSLTPP));
217     }
218     else
219     {
220         return (HWREG(ui32Base + CCM_O_CRCSEED));
221     }
222 }
223 
224 //*****************************************************************************
225 //
226 //! Process data to generate a CRC with the EC module.
227 //!
228 //! \param ui32Base is the base address of the EC module.
229 //! \param pui32DataIn is a pointer to an array of data that is processed.
230 //! \param ui32DataLength is the number of data items that are processed
231 //! to produce the CRC.
232 //! \param bPPResult is \b true to read the post-processed result, or \b false
233 //! to read the unmodified result.
234 //!
235 //! This function processes an array of data to produce a CRC result.
236 //!
237 //! The data in the array pointed to be \e pui32DataIn is either an array
238 //! of bytes or an array or words depending on the selection of the input
239 //! data size options \b CRC_CFG_SIZE_8BIT and
240 //! \b CRC_CFG_SIZE_32BIT.
241 //!
242 //! This function returns either the unmodified CRC result or the
243 //! post- processed CRC result from the EC module.  The post-processing
244 //! options are selectable through \b CRC_CFG_RESINV and
245 //! \b CRC_CFG_OBR parameters.
246 //!
247 //! \return The CRC result.
248 //
249 //*****************************************************************************
250 uint32_t
CRCDataProcess(uint32_t ui32Base,uint32_t * pui32DataIn,uint32_t ui32DataLength,bool bPPResult)251 CRCDataProcess(uint32_t ui32Base, uint32_t *pui32DataIn,
252                uint32_t ui32DataLength, bool bPPResult)
253 {
254     uint8_t *pui8DataIn;
255 
256     //
257     // Check the arguments.
258     //
259     ASSERT(ui32Base == CCM0_BASE);
260 
261     //
262     // See if the CRC is operating in 8-bit or 32-bit mode.
263     //
264     if (HWREG(ui32Base + CCM_O_CRCCTRL) & CCM_CRCCTRL_SIZE)
265     {
266         //
267         // The CRC is operating in 8-bit mode, so create an 8-bit pointer to
268         // the data.
269         //
270         pui8DataIn = (uint8_t *)pui32DataIn;
271 
272         //
273         // Loop through the input data.
274         //
275         while (ui32DataLength--)
276         {
277             //
278             // Write the next data byte.
279             //
280             HWREG(ui32Base + CCM_O_CRCDIN) = *pui8DataIn++;
281         }
282     }
283     else
284     {
285         //
286         // The CRC is operating in 32-bit mode, so loop through the input data.
287         //
288         while (ui32DataLength--)
289         {
290             //
291             // Write the next data word.
292             //
293             HWREG(ui32Base + CCM_O_CRCDIN) = *pui32DataIn++;
294         }
295     }
296 
297     //
298     // Return the result.
299     //
300     return (CRCResultRead(ui32Base, bPPResult));
301 }
302 
303 //*****************************************************************************
304 //
305 // Close the Doxygen group.
306 //! @}
307 //
308 //*****************************************************************************
309