1 //***************************************************************************** 2 // 3 // lcd.h - Defines and Macros for the LCD Controller module. 4 // 5 // Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved. 6 // Software License Agreement 7 // 8 // Redistribution and use in source and binary forms, with or without 9 // modification, are permitted provided that the following conditions 10 // are met: 11 // 12 // Redistributions of source code must retain the above copyright 13 // notice, this list of conditions and the following disclaimer. 14 // 15 // Redistributions in binary form must reproduce the above copyright 16 // notice, this list of conditions and the following disclaimer in the 17 // documentation and/or other materials provided with the 18 // distribution. 19 // 20 // Neither the name of Texas Instruments Incorporated nor the names of 21 // its contributors may be used to endorse or promote products derived 22 // from this software without specific prior written permission. 23 // 24 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 // 36 //***************************************************************************** 37 38 #ifndef __DRIVERLIB_LCD_H__ 39 #define __DRIVERLIB_LCD_H__ 40 41 #include <stdint.h> 42 #include <stdbool.h> 43 44 //***************************************************************************** 45 // 46 //! \addtogroup lcd_api 47 //! @{ 48 // 49 //***************************************************************************** 50 51 //***************************************************************************** 52 // 53 // If building with a C++ compiler, make all of the definitions in this header 54 // have a C binding. 55 // 56 //***************************************************************************** 57 #ifdef __cplusplus 58 extern "C" 59 { 60 #endif 61 62 //***************************************************************************** 63 // 64 //! This macro can be used to convert a 24-bit RGB color value as used by the 65 //! MSP432E4 Graphics Library into a 12-bit LCD controller color palette 66 //! entry. 67 // 68 //***************************************************************************** 69 #define PAL_FROM_RGB(ui32RGBColor) (((ui32RGBColor & 0xF0) >> 4) | \ 70 ((ui32RGBColor & 0xF000) >> 8) | \ 71 ((ui32RGBColor & 0xF00000) >> 12)) 72 73 //***************************************************************************** 74 // 75 //! This macro can be used to convert from time in microseconds to periods of 76 //! the supplied clock in Hertz as required when setting up the LIDD and raster 77 //! timing structures. The calculation will round such that the number of 78 //! cycles returned represents no longer a time than specified in the 79 //! ui32Time_uS parameter. Values of ui32Time_uS less than or equal to 80 //! 4294967uS (4.29 seconds) are supported by the macro. Larger values will 81 //! cause arithmetic overflow and yield incorrect values. It is further 82 //! assumed that ui32ClockFreq is a non-zero multiple of 1000000 (1MHz). 83 // 84 //***************************************************************************** 85 #define CYCLES_FROM_TIME_US(ui32ClockFreq, ui32Time_uS) \ 86 (((ui32Time_uS) == 0) ? 0 : \ 87 (((ui32ClockFreq) / 1000000) * ((((ui32Time_uS) * 1000) - 1) / 1000)) + 1) 88 89 //***************************************************************************** 90 // 91 //! This macro can be used to convert from time in nanoseconds to periods of 92 //! the supplied clock in Hertz as required when setting up the LIDD and raster 93 //! timing structures. The calculation will round such that the number of 94 //! cycles returned represents no longer a time than specified in the 95 //! ui32Time_nS parameter. Values of ui32Time_nS less than or equal to 96 //! 35791394 (35.79 milliseconds) are supported by the macro. Larger values 97 //! will cause arithmetic overflow and yield incorrect values. It is further 98 //! assumed that ui32ClockFreq is a non-zero multiple of 1000000 (1MHz). 99 // 100 //***************************************************************************** 101 #define CYCLES_FROM_TIME_NS(ui32ClockFreq, ui32Time_nS) \ 102 (((ui32Time_nS) == 0) ? 0 : \ 103 ((((((ui32ClockFreq) / 1000000) * ((ui32Time_nS) - 1)) / 1000)) + 1)) 104 105 //***************************************************************************** 106 // 107 //! A structure containing timing parameters for the LIDD (LCD Interface 108 //! Display Driver) interface. This is used with the LCDIDDTimingSet function. 109 // 110 //***************************************************************************** 111 typedef struct 112 { 113 // 114 //! Write Strobe Set-Up cycles. When performing a write access, this 115 //! field defines the number of MCLK cycles that Data Bus/Pad Output 116 //! Enable, ALE, the Direction bit, and Chip Select have to be ready before 117 //! the Write Strobe is asserted. Valid values are from 0 to 31. 118 // 119 uint8_t ui8WSSetup; 120 121 // 122 //! Write Strobe Duration cycles. Field value defines the number of MCLK 123 //! cycles for which the Write Strobe is held active when performing a 124 //! write access. Valid values are from 1 to 63. 125 // 126 uint8_t ui8WSDuration; 127 128 // 129 //! Write Strobe Hold cycles. Field value defines the number of MCLK 130 //! cycles for which Data Bus/Pad Output Enable, ALE, the Direction bit, 131 //! and Chip Select are held after the Write Strobe is deasserted when 132 //! performing a write access. Valid values are from 1 to 15. 133 // 134 uint8_t ui8WSHold; 135 136 // 137 //! Read Strobe Set-Up cycles. When performing a read access, this field 138 //! defines the number of MCLK cycles that Data Bus/Pad Output Enable, ALE, 139 //! the Direction bit, and Chip Select have to be ready before the Read 140 //! Strobe is asserted. Valid values are from 0 to 31. 141 // 142 uint8_t ui8RSSetup; 143 144 // 145 //! Read Strobe Duration cycles. Field value defines the number of MCLK 146 //! cycles for which the Read Strobe is held active when performing a read 147 //! access. Valid values are from 1 to 63. 148 // 149 uint8_t ui8RSDuration; 150 151 // 152 //! Read Strobe Hold cycles. Field value defines the number of MCLK cycles 153 //! for which Data Bus/Pad Output Enable, ALE, the Direction bit, and Chip 154 //! Select are held after the Read Strobe is deasserted when performing a 155 //! read access. Valid values are from 1 to 15. 156 // 157 uint8_t ui8RSHold; 158 159 // 160 //! Field value defines the number of MCLK cycles between the end of one 161 //! device access and the start of another device access using the same 162 //! Chip Select unless the two accesses are both Reads. In this case, 163 //! this delay is not incurred. Valid vales are from 1 to 4. 164 // 165 uint8_t ui8DelayCycles; 166 } 167 tLCDIDDTiming; 168 169 // 170 // Values which can be ORed together within the ui32Flags field of the 171 // tLCDRasterTiming structure. 172 // 173 #define RASTER_TIMING_SYNCS_OPPOSITE_PIXCLK \ 174 0x00000000 175 #define RASTER_TIMING_SYNCS_ON_RISING_PIXCLK \ 176 0x02000000 177 #define RASTER_TIMING_SYNCS_ON_FALLING_PIXCLK \ 178 0x03000000 179 #define RASTER_TIMING_ACTIVE_HIGH_OE \ 180 0x00000000 181 #define RASTER_TIMING_ACTIVE_LOW_OE \ 182 0x00800000 183 #define RASTER_TIMING_ACTIVE_HIGH_PIXCLK \ 184 0x00000000 185 #define RASTER_TIMING_ACTIVE_LOW_PIXCLK \ 186 0x00400000 187 #define RASTER_TIMING_ACTIVE_HIGH_HSYNC \ 188 0x00000000 189 #define RASTER_TIMING_ACTIVE_LOW_HSYNC \ 190 0x00200000 191 #define RASTER_TIMING_ACTIVE_HIGH_VSYNC \ 192 0x00000000 193 #define RASTER_TIMING_ACTIVE_LOW_VSYNC \ 194 0x00100000 195 196 // 197 //! A structure containing timing parameters for the raster interface. This is 198 //! used with the LCDRasterTimingSet function. 199 // 200 typedef struct 201 { 202 // 203 //! Flags configuring the polarity and active edges of the various signals 204 //! in the raster interface. This field is comprised of a logical OR of 205 //! the labels with prefix ``RASTER_TIMING_''. 206 // 207 uint32_t ui32Flags; 208 209 // 210 //! The number of pixels contained within each line on the LCD display. 211 //! Valid values are multiple of 16 less than or equal to 2048. 212 // 213 uint16_t ui16PanelWidth; 214 215 // 216 //! The number of lines on the LCD display. Valid values are from 1 to 217 //! 2048. 218 // 219 uint16_t ui16PanelHeight; 220 221 // 222 //! A value from 1 to 1024 that specifies the number of pixel clock periods 223 //! to add to the end of each line after active video has ended. 224 // 225 uint16_t ui16HFrontPorch; 226 227 // 228 //! A value from 1 to 1024 that specifies the number of pixel clock periods 229 //! to add to the beginning of a line before active video is asserted. 230 // 231 uint16_t ui16HBackPorch; 232 233 // 234 //! A value from 1 to 1024 that specifies the number of pixel clock periods 235 //! to pulse the line clock at the end of each line. 236 // 237 uint16_t ui16HSyncWidth; 238 239 // 240 //! A value from 0 to 255 that specifies the number of line clock periods 241 //! to add to the end of each frame after the last active line. 242 // 243 uint8_t ui8VFrontPorch; 244 245 // 246 //! A value from 0 to 255 that specifies the number of line clock periods 247 //! to add to the beginning of a frame before the first active line is 248 //! output to the display. 249 // 250 uint8_t ui8VBackPorch; 251 252 // 253 //! In active mode, a value from 1 to 64 that specifies the number of 254 //! line clock periods to set the lcd_fp pin active at the end of each 255 //! frame after the vertical front porch period elapses. The number of 256 //! The frame clock is used as the VSYNC signal in active mode. 257 //! 258 //! In passive mode, a value from 1 to 64 that specifies the number of 259 //! extra line clock periods to insert after the vertical front porch 260 //! period has elapsed. Note that the width of lcd_fp is not affected by 261 //! this value in passive mode. 262 // 263 uint8_t ui8VSyncWidth; 264 265 // 266 //! A value from 0 to 255 that specifies the number of line clocks to 267 //! count before transitioning the AC Bias pin. This pin is used to 268 //! periodically invert the polarity of the power supply to prevent DC 269 //! charge build-up within the display. 270 // 271 uint8_t ui8ACBiasLineCount; 272 } 273 tLCDRasterTiming; 274 275 //***************************************************************************** 276 // 277 // Possible values for the ui8Mode parameter to LCDModeSet(). The label 278 // LCD_MODE_AUTO_UFLOW_RESTART may be ORed with either of the other two. 279 // 280 //***************************************************************************** 281 #define LCD_MODE_LIDD ((uint8_t)0x00) 282 #define LCD_MODE_RASTER ((uint8_t)0x01) 283 #define LCD_MODE_AUTO_UFLOW_RESTART \ 284 ((uint8_t)0x02) 285 286 //***************************************************************************** 287 // 288 // Values used to construct the ui32Config parameter to LCDIDDConfigSet(). 289 // 290 //***************************************************************************** 291 #define LIDD_CONFIG_SYNC_MPU68 0x00000000 292 #define LIDD_CONFIG_ASYNC_MPU68 0x00000001 293 #define LIDD_CONFIG_SYNC_MPU80 0x00000002 294 #define LIDD_CONFIG_ASYNC_MPU80 0x00000003 295 #define LIDD_CONFIG_ASYNC_HITACHI \ 296 0x00000004 297 #define LIDD_CONFIG_INVERT_ALE 0x00000008 298 #define LIDD_CONFIG_INVERT_RS_EN \ 299 0x00000010 300 #define LIDD_CONFIG_INVERT_WS_DIR \ 301 0x00000020 302 #define LIDD_CONFIG_INVERT_CS0 0x00000040 303 #define LIDD_CONFIG_INVERT_CS1 0x00000080 304 305 //***************************************************************************** 306 // 307 // Values used to construct the ui32Config parameter to 308 // LCDRasterConfigSet(). Valid parameters contain one of the RASTER_FMT_xxx 309 // labels optionally ORed with the other flags. Only one of 310 // RASTER_LOAD_DATA_ONLY and RASTER_LOAD_PALETTE_ONLY may be specified (if 311 // neither is specified, the controller will load both palette and data when 312 // scanning out the frame buffer). 313 // 314 //***************************************************************************** 315 #define RASTER_FMT_ACTIVE_24BPP_PACKED \ 316 0x02000080 317 #define RASTER_FMT_ACTIVE_24BPP_UNPACKED \ 318 0x06000080 319 #define RASTER_FMT_ACTIVE_PALETTIZED_12BIT \ 320 0x00000080 321 #define RASTER_FMT_ACTIVE_PALETTIZED_16BIT \ 322 0x00800080 323 #define RASTER_FMT_PASSIVE_MONO_4PIX \ 324 0x00000002 325 #define RASTER_FMT_PASSIVE_MONO_8PIX \ 326 0x00000202 327 #define RASTER_FMT_PASSIVE_PALETTIZED \ 328 0x00000000 329 #define RASTER_FMT_PASSIVE_COLOR_12BIT \ 330 0x00000000 331 #define RASTER_FMT_PASSIVE_COLOR_16BIT \ 332 0x01000000 333 #define RASTER_ACTVID_DURING_BLANK \ 334 0x08000000 335 #define RASTER_NIBBLE_MODE_ENABLED \ 336 0x00400000 337 #define RASTER_LOAD_DATA_ONLY 0x00200000 338 #define RASTER_LOAD_PALETTE_ONLY \ 339 0x00100000 340 #define RASTER_READ_ORDER_REVERSED \ 341 0x00000100 342 343 //***************************************************************************** 344 // 345 // Interrupt sources for the LCD controller. These may be ORed together and 346 // passed to LCDIntEnable(), LCDIntDisable() and LCDIntClear(). They are also 347 // returned by LCDIntStatus(). 348 // 349 //***************************************************************************** 350 #define LCD_INT_DMA_DONE 0x00000001 351 #define LCD_INT_RASTER_FRAME_DONE \ 352 0x00000002 353 #define LCD_INT_SYNC_LOST 0x00000004 354 #define LCD_INT_AC_BIAS_CNT 0x00000008 355 #define LCD_INT_UNDERFLOW 0x00000020 356 #define LCD_INT_PAL_LOAD 0x00000040 357 #define LCD_INT_EOF0 0x00000100 358 #define LCD_INT_EOF1 0x00000200 359 360 //***************************************************************************** 361 // 362 // Configuration values used with LCDDMAConfigSet(). 363 // 364 //***************************************************************************** 365 #define LCD_DMA_FIFORDY_8_WORDS 0x00000000 366 #define LCD_DMA_FIFORDY_16_WORDS \ 367 0x00000100 368 #define LCD_DMA_FIFORDY_32_WORDS \ 369 0x00000200 370 #define LCD_DMA_FIFORDY_64_WORDS \ 371 0x00000300 372 #define LCD_DMA_FIFORDY_128_WORDS \ 373 0x00000400 374 #define LCD_DMA_FIFORDY_256_WORDS \ 375 0x00000500 376 #define LCD_DMA_FIFORDY_512_WORDS \ 377 0x00000600 378 #define LCD_DMA_BURST_1 0x00000010 379 #define LCD_DMA_BURST_2 0x00000010 380 #define LCD_DMA_BURST_4 0x00000020 381 #define LCD_DMA_BURST_8 0x00000030 382 #define LCD_DMA_BURST_16 0x00000040 383 #define LCD_DMA_BYTE_ORDER_0123 0x00000000 384 #define LCD_DMA_BYTE_ORDER_1023 0x00000008 385 #define LCD_DMA_BYTE_ORDER_3210 0x00000002 386 #define LCD_DMA_BYTE_ORDER_2301 0x0000000A 387 #define LCD_DMA_PING_PONG 0x00000001 388 389 //***************************************************************************** 390 // 391 // Type values used with LCDRasterPaletteSet(). 392 // 393 //***************************************************************************** 394 #define LCD_PALETTE_TYPE_1BPP 0x00000000 395 #define LCD_PALETTE_TYPE_2BPP 0x00001000 396 #define LCD_PALETTE_TYPE_4BPP 0x00002000 397 #define LCD_PALETTE_TYPE_8BPP 0x00003000 398 #define LCD_PALETTE_TYPE_DIRECT 0x00004000 399 #define LCD_PALETTE_SRC_24BIT 0x80000000 400 401 //***************************************************************************** 402 // 403 // Flags used in the ui32Clocks parameter to LCDClockReset(). 404 // 405 //***************************************************************************** 406 #define LCD_CLOCK_MAIN 0x00000008 407 #define LCD_CLOCK_DMA 0x00000004 408 #define LCD_CLOCK_LIDD 0x00000002 409 #define LCD_CLOCK_CORE 0x00000001 410 411 //***************************************************************************** 412 // 413 // Flags used in with LCDSubPanelConfigSet(). 414 // 415 //***************************************************************************** 416 #define LCD_SUBPANEL_AT_TOP 0x20000000 417 #define LCD_SUBPANEL_AT_BOTTOM 0x00000000 418 419 //***************************************************************************** 420 // 421 // Close the Doxygen group. 422 //! @} 423 // 424 //***************************************************************************** 425 426 //***************************************************************************** 427 // 428 // Function Prototypes. 429 // 430 //***************************************************************************** 431 extern uint32_t LCDModeSet(uint32_t ui32Base, uint8_t ui8Mode, 432 uint32_t ui32PixClk, uint32_t ui32SysClk); 433 extern void LCDClockReset(uint32_t ui32Base, uint32_t ui32Clocks); 434 extern void LCDIDDConfigSet(uint32_t ui32Base, uint32_t ui32Config); 435 extern void LCDIDDTimingSet(uint32_t ui32Base, uint32_t ui32CS, 436 const tLCDIDDTiming *pTiming); 437 extern void LCDIDDDMADisable(uint32_t ui32Base); 438 extern void LCDIDDCommandWrite(uint32_t ui32Base, uint32_t ui32CS, 439 uint16_t ui16Cmd); 440 extern void LCDIDDDataWrite(uint32_t ui32Base, uint32_t ui32CS, 441 uint16_t ui16Data); 442 extern void LCDIDDIndexedWrite(uint32_t ui32Base, uint32_t ui32CS, 443 uint16_t ui16Addr, uint16_t ui16Data); 444 extern uint16_t LCDIDDStatusRead(uint32_t ui32Base, uint32_t ui32CS); 445 extern uint16_t LCDIDDDataRead(uint32_t ui32Base, uint32_t ui32CS); 446 extern uint16_t LCDIDDIndexedRead(uint32_t ui32Base, uint32_t ui32CS, 447 uint16_t ui16Addr); 448 extern void LCDIDDDMAWrite(uint32_t ui32Base, uint32_t ui32CS, 449 const uint32_t *pui32Data, uint32_t ui32Count); 450 extern void LCDRasterConfigSet(uint32_t ui32Base, uint32_t ui32Config, 451 uint8_t ui8PalLoadDelay); 452 extern void LCDRasterTimingSet(uint32_t ui32Base, 453 const tLCDRasterTiming *pTiming); 454 extern void LCDRasterACBiasIntCountSet(uint32_t ui32Base, uint8_t ui8Count); 455 extern void LCDRasterEnable(uint32_t ui32Base); 456 extern bool LCDRasterEnabled(uint32_t ui32Base); 457 extern void LCDRasterDisable(uint32_t ui32Base); 458 extern void LCDRasterSubPanelConfigSet(uint32_t ui32Base, uint32_t ui32Flags, 459 uint32_t ui32BottomLines, 460 uint32_t ui32DefaultPixel); 461 extern void LCDRasterSubPanelEnable(uint32_t ui32Base); 462 extern void LCDRasterSubPanelDisable(uint32_t ui32Base); 463 extern void LCDDMAConfigSet(uint32_t ui32Base, uint32_t ui32Config); 464 extern void LCDRasterPaletteSet(uint32_t ui32Base, uint32_t ui32Type, 465 uint32_t *pui32PalAddr, 466 const uint32_t *pui32SrcColors, 467 uint32_t ui32Start, 468 uint32_t ui32Count); 469 extern void LCDRasterFrameBufferSet(uint32_t ui32Base, uint8_t ui8Buffer, 470 uint32_t *pui32Addr, 471 uint32_t ui32NumBytes); 472 extern void LCDIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags); 473 extern void LCDIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags); 474 extern uint32_t LCDIntStatus(uint32_t ui32Base, bool bMasked); 475 extern void LCDIntClear(uint32_t ui32Base, uint32_t ui32IntFlags); 476 extern void LCDIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)); 477 extern void LCDIntUnregister(uint32_t ui32Base); 478 479 //***************************************************************************** 480 // 481 // Mark the end of the C bindings section for C++ compilers. 482 // 483 //***************************************************************************** 484 #ifdef __cplusplus 485 } 486 #endif 487 488 #endif // __DRIVERLIB_LCD_H__ 489