1 //***************************************************************************** 2 // 3 // sysctl.h - Prototypes for the system control driver. 4 // 5 // Copyright (c) 2005-2017 Texas Instruments Incorporated. All rights reserved. 6 // Software License Agreement 7 // 8 // Redistribution and use in source and binary forms, with or without 9 // modification, are permitted provided that the following conditions 10 // are met: 11 // 12 // Redistributions of source code must retain the above copyright 13 // notice, this list of conditions and the following disclaimer. 14 // 15 // Redistributions in binary form must reproduce the above copyright 16 // notice, this list of conditions and the following disclaimer in the 17 // documentation and/or other materials provided with the 18 // distribution. 19 // 20 // Neither the name of Texas Instruments Incorporated nor the names of 21 // its contributors may be used to endorse or promote products derived 22 // from this software without specific prior written permission. 23 // 24 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 // 36 //***************************************************************************** 37 38 #ifndef __DRIVERLIB_SYSCTL_H__ 39 #define __DRIVERLIB_SYSCTL_H__ 40 41 #include <stdint.h> 42 #include <stdbool.h> 43 44 //***************************************************************************** 45 // 46 // If building with a C++ compiler, make all of the definitions in this header 47 // have a C binding. 48 // 49 //***************************************************************************** 50 #ifdef __cplusplus 51 extern "C" 52 { 53 #endif 54 55 //***************************************************************************** 56 // 57 // The following are values that can be passed to the 58 // SysCtlPeripheralPresent(), SysCtlPeripheralEnable(), 59 // SysCtlPeripheralDisable(), and SysCtlPeripheralReset() APIs as the 60 // ui32Peripheral parameter. The peripherals in the fourth group (upper nibble 61 // is 3) can only be used with the SysCtlPeripheralPresent() API. 62 // 63 //***************************************************************************** 64 #define SYSCTL_PERIPH_ADC0 0xf0003800 // ADC 0 65 #define SYSCTL_PERIPH_ADC1 0xf0003801 // ADC 1 66 #define SYSCTL_PERIPH_CAN0 0xf0003400 // CAN 0 67 #define SYSCTL_PERIPH_CAN1 0xf0003401 // CAN 1 68 #define SYSCTL_PERIPH_COMP0 0xf0003c00 // Analog Comparator Module 0 69 #define SYSCTL_PERIPH_EMAC0 0xf0009c00 // Ethernet MAC0 70 #define SYSCTL_PERIPH_EPHY0 0xf0003000 // Ethernet PHY0 71 #define SYSCTL_PERIPH_EPI0 0xf0001000 // EPI0 72 #define SYSCTL_PERIPH_GPIOA 0xf0000800 // GPIO A 73 #define SYSCTL_PERIPH_GPIOB 0xf0000801 // GPIO B 74 #define SYSCTL_PERIPH_GPIOC 0xf0000802 // GPIO C 75 #define SYSCTL_PERIPH_GPIOD 0xf0000803 // GPIO D 76 #define SYSCTL_PERIPH_GPIOE 0xf0000804 // GPIO E 77 #define SYSCTL_PERIPH_GPIOF 0xf0000805 // GPIO F 78 #define SYSCTL_PERIPH_GPIOG 0xf0000806 // GPIO G 79 #define SYSCTL_PERIPH_GPIOH 0xf0000807 // GPIO H 80 #define SYSCTL_PERIPH_GPIOJ 0xf0000808 // GPIO J 81 #define SYSCTL_PERIPH_HIBERNATE 0xf0001400 // Hibernation module 82 #define SYSCTL_PERIPH_CCM0 0xf0007400 // CCM 0 83 #define SYSCTL_PERIPH_EEPROM0 0xf0005800 // EEPROM 0 84 #define SYSCTL_PERIPH_GPIOK 0xf0000809 // GPIO K 85 #define SYSCTL_PERIPH_GPIOL 0xf000080a // GPIO L 86 #define SYSCTL_PERIPH_GPIOM 0xf000080b // GPIO M 87 #define SYSCTL_PERIPH_GPION 0xf000080c // GPIO N 88 #define SYSCTL_PERIPH_GPIOP 0xf000080d // GPIO P 89 #define SYSCTL_PERIPH_GPIOQ 0xf000080e // GPIO Q 90 #define SYSCTL_PERIPH_GPIOR 0xf000080f // GPIO R 91 #define SYSCTL_PERIPH_GPIOS 0xf0000810 // GPIO S 92 #define SYSCTL_PERIPH_GPIOT 0xf0000811 // GPIO T 93 #define SYSCTL_PERIPH_I2C0 0xf0002000 // I2C 0 94 #define SYSCTL_PERIPH_I2C1 0xf0002001 // I2C 1 95 #define SYSCTL_PERIPH_I2C2 0xf0002002 // I2C 2 96 #define SYSCTL_PERIPH_I2C3 0xf0002003 // I2C 3 97 #define SYSCTL_PERIPH_I2C4 0xf0002004 // I2C 4 98 #define SYSCTL_PERIPH_I2C5 0xf0002005 // I2C 5 99 #define SYSCTL_PERIPH_I2C6 0xf0002006 // I2C 6 100 #define SYSCTL_PERIPH_I2C7 0xf0002007 // I2C 7 101 #define SYSCTL_PERIPH_I2C8 0xf0002008 // I2C 8 102 #define SYSCTL_PERIPH_I2C9 0xf0002009 // I2C 9 103 #define SYSCTL_PERIPH_LCD0 0xf0009000 // LCD 0 104 #define SYSCTL_PERIPH_ONEWIRE0 0xf0009800 // One Wire 0 105 #define SYSCTL_PERIPH_PWM0 0xf0004000 // PWM 0 106 #define SYSCTL_PERIPH_PWM1 0xf0004001 // PWM 1 107 #define SYSCTL_PERIPH_QEI0 0xf0004400 // QEI 0 108 #define SYSCTL_PERIPH_QEI1 0xf0004401 // QEI 1 109 #define SYSCTL_PERIPH_SSI0 0xf0001c00 // SSI 0 110 #define SYSCTL_PERIPH_SSI1 0xf0001c01 // SSI 1 111 #define SYSCTL_PERIPH_SSI2 0xf0001c02 // SSI 2 112 #define SYSCTL_PERIPH_SSI3 0xf0001c03 // SSI 3 113 #define SYSCTL_PERIPH_TIMER0 0xf0000400 // Timer 0 114 #define SYSCTL_PERIPH_TIMER1 0xf0000401 // Timer 1 115 #define SYSCTL_PERIPH_TIMER2 0xf0000402 // Timer 2 116 #define SYSCTL_PERIPH_TIMER3 0xf0000403 // Timer 3 117 #define SYSCTL_PERIPH_TIMER4 0xf0000404 // Timer 4 118 #define SYSCTL_PERIPH_TIMER5 0xf0000405 // Timer 5 119 #define SYSCTL_PERIPH_TIMER6 0xf0000406 // Timer 6 120 #define SYSCTL_PERIPH_TIMER7 0xf0000407 // Timer 7 121 #define SYSCTL_PERIPH_UART0 0xf0001800 // UART 0 122 #define SYSCTL_PERIPH_UART1 0xf0001801 // UART 1 123 #define SYSCTL_PERIPH_UART2 0xf0001802 // UART 2 124 #define SYSCTL_PERIPH_UART3 0xf0001803 // UART 3 125 #define SYSCTL_PERIPH_UART4 0xf0001804 // UART 4 126 #define SYSCTL_PERIPH_UART5 0xf0001805 // UART 5 127 #define SYSCTL_PERIPH_UART6 0xf0001806 // UART 6 128 #define SYSCTL_PERIPH_UART7 0xf0001807 // UART 7 129 #define SYSCTL_PERIPH_UDMA 0xf0000c00 // uDMA 130 #define SYSCTL_PERIPH_USB0 0xf0002800 // USB 0 131 #define SYSCTL_PERIPH_WDOG0 0xf0000000 // Watchdog 0 132 #define SYSCTL_PERIPH_WDOG1 0xf0000001 // Watchdog 1 133 134 //***************************************************************************** 135 // 136 // The following are values that can be passed to the SysCtlLDODeepSleepSet() 137 // API as the ui32Voltage value, or returned by the SysCtlLDODeepSleepGet() API. 138 // 139 //***************************************************************************** 140 #define SYSCTL_LDO_0_90V 0x80000012 // LDO output of 0.90V 141 #define SYSCTL_LDO_0_95V 0x80000013 // LDO output of 0.95V 142 #define SYSCTL_LDO_1_00V 0x80000014 // LDO output of 1.00V 143 #define SYSCTL_LDO_1_05V 0x80000015 // LDO output of 1.05V 144 #define SYSCTL_LDO_1_10V 0x80000016 // LDO output of 1.10V 145 #define SYSCTL_LDO_1_15V 0x80000017 // LDO output of 1.15V 146 #define SYSCTL_LDO_1_20V 0x80000018 // LDO output of 1.20V 147 148 //***************************************************************************** 149 // 150 // The following are values that can be passed to the SysCtlIntEnable(), 151 // SysCtlIntDisable(), and SysCtlIntClear() APIs, or returned in the bit mask 152 // by the SysCtlIntStatus() API. 153 // 154 //***************************************************************************** 155 #define SYSCTL_INT_BOR0 0x00000800 // VDD under BOR0 156 #define SYSCTL_INT_VDDA_OK 0x00000400 // VDDA Power OK 157 #define SYSCTL_INT_MOSC_PUP 0x00000100 // MOSC power-up interrupt 158 #define SYSCTL_INT_USBPLL_LOCK 0x00000080 // USB PLL lock interrupt 159 #define SYSCTL_INT_PLL_LOCK 0x00000040 // PLL lock interrupt 160 #define SYSCTL_INT_MOSC_FAIL 0x00000008 // Main oscillator failure int 161 #define SYSCTL_INT_BOR1 0x00000002 // VDD under BOR1 162 #define SYSCTL_INT_BOR 0x00000002 // Brown out interrupt 163 164 //***************************************************************************** 165 // 166 // The following are values that can be passed to the SysCtlResetCauseClear() 167 // API or returned by the SysCtlResetCauseGet() API. 168 // 169 //***************************************************************************** 170 #define SYSCTL_CAUSE_HSRVREQ 0x00001000 // Hardware System Service Request 171 #define SYSCTL_CAUSE_HIB 0x00000040 // Hibernate reset 172 #define SYSCTL_CAUSE_WDOG1 0x00000020 // Watchdog 1 reset 173 #define SYSCTL_CAUSE_SW 0x00000010 // Software reset 174 #define SYSCTL_CAUSE_WDOG0 0x00000008 // Watchdog 0 reset 175 #define SYSCTL_CAUSE_BOR 0x00000004 // Brown-out reset 176 #define SYSCTL_CAUSE_POR 0x00000002 // Power on reset 177 #define SYSCTL_CAUSE_EXT 0x00000001 // External reset 178 179 //***************************************************************************** 180 // 181 // The following are values that can be passed to the SysCtlBrownOutConfigSet() 182 // API as the ui32Config parameter. 183 // 184 //***************************************************************************** 185 #define SYSCTL_BOR_RESET 0x00000002 // Reset instead of interrupting 186 #define SYSCTL_BOR_RESAMPLE 0x00000001 // Resample BOR before asserting 187 188 //***************************************************************************** 189 // 190 // The following are values that can be passed to the SysCtlClockFreqSet() API as 191 // the ui32Config parameter. 192 // 193 //***************************************************************************** 194 #define SYSCTL_CFG_VCO_240 0xF1000000 // VCO is 240 MHz 195 #define SYSCTL_CFG_VCO_160 0xF0000000 // VCO is 160 MHz 196 #define SYSCTL_USE_PLL 0x00000000 // System clock is the PLL clock 197 #define SYSCTL_USE_OSC 0x00003800 // System clock is the osc clock 198 #define SYSCTL_XTAL_5MHZ 0x00000000 // External crystal is 5MHz 199 #define SYSCTL_XTAL_6MHZ 0x00000040 // External crystal is 6MHz 200 #define SYSCTL_XTAL_8MHZ 0x00000080 // External crystal is 8MHz 201 #define SYSCTL_XTAL_10MHZ 0x000000C0 // External crystal is 10 MHz 202 #define SYSCTL_XTAL_12MHZ 0x00000100 // External crystal is 12 MHz 203 #define SYSCTL_XTAL_16MHZ 0x00000140 // External crystal is 16 MHz 204 #define SYSCTL_XTAL_18MHZ 0x00000180 // External crystal is 18.0 MHz 205 #define SYSCTL_XTAL_20MHZ 0x000001C0 // External crystal is 20.0 MHz 206 #define SYSCTL_XTAL_24MHZ 0x00000200 // External crystal is 24.0 MHz 207 #define SYSCTL_XTAL_25MHZ 0x00000240 // External crystal is 25.0 MHz 208 #define SYSCTL_OSC_MAIN 0x00000000 // Osc source is main osc 209 #define SYSCTL_OSC_INT 0x00000010 // Osc source is int. osc 210 #define SYSCTL_OSC_INT30 0x00000030 // Osc source is int. 30 KHz 211 #define SYSCTL_OSC_EXT32 0x80000038 // Osc source is ext. 32 KHz 212 #define SYSCTL_CFG_VCO_480 SYSCTL_CFG_VCO_240 // For backward compatibility 213 #define SYSCTL_CFG_VCO_320 SYSCTL_CFG_VCO_160 // For backward compatibility 214 //***************************************************************************** 215 // 216 // The following are values that can be passed to the 217 // SysCtlDeepSleepClockConfigSet() API as the ui32Config parameter. 218 // 219 //***************************************************************************** 220 #define SYSCTL_DSLP_OSC_MAIN 0x00000000 // Osc source is main osc 221 #define SYSCTL_DSLP_OSC_INT 0x00000010 // Osc source is int. osc 222 #define SYSCTL_DSLP_OSC_INT30 0x00000030 // Osc source is int. 30 KHz 223 #define SYSCTL_DSLP_OSC_EXT32 0x00000070 // Osc source is ext. 32 KHz 224 #define SYSCTL_DSLP_PIOSC_PD 0x00000002 // Power down PIOSC in deep-sleep 225 #define SYSCTL_DSLP_MOSC_DPD 0x40000000 // Power down MOSC in deep-sleep 226 227 //***************************************************************************** 228 // 229 // The following are values that can be passed to the SysCtlPIOSCCalibrate() 230 // API as the ui32Type parameter. 231 // 232 //***************************************************************************** 233 #define SYSCTL_PIOSC_CAL_AUTO 0x00000200 // Automatic calibration 234 #define SYSCTL_PIOSC_CAL_FACT 0x00000100 // Factory calibration 235 #define SYSCTL_PIOSC_CAL_USER 0x80000100 // User-supplied calibration 236 237 //***************************************************************************** 238 // 239 // The following are values that can be passed to the SysCtlMOSCConfigSet() API 240 // as the ui32Config parameter. 241 // 242 //***************************************************************************** 243 #define SYSCTL_MOSC_VALIDATE 0x00000001 // Enable MOSC validation 244 #define SYSCTL_MOSC_INTERRUPT 0x00000002 // Generate interrupt on MOSC fail 245 #define SYSCTL_MOSC_NO_XTAL 0x00000004 // No crystal is attached to MOSC 246 #define SYSCTL_MOSC_PWR_DIS 0x00000008 // Power down the MOSC. 247 #define SYSCTL_MOSC_LOWFREQ 0x00000000 // MOSC is less than 10MHz 248 #define SYSCTL_MOSC_HIGHFREQ 0x00000010 // MOSC is greater than 10MHz 249 #define SYSCTL_MOSC_SESRC 0x00000020 // Singled ended oscillator source. 250 251 //***************************************************************************** 252 // 253 // The following are values that can be passed to the SysCtlSleepPowerSet() and 254 // SysCtlDeepSleepPowerSet() APIs as the ui32Config parameter. 255 // 256 //***************************************************************************** 257 #define SYSCTL_LDO_SLEEP 0x00000200 // LDO in sleep mode 258 // (Deep Sleep Only) 259 #define SYSCTL_TEMP_LOW_POWER 0x00000100 // Temp sensor in low power mode 260 // (Deep Sleep Only) 261 #define SYSCTL_FLASH_NORMAL 0x00000000 // Flash in normal mode 262 #define SYSCTL_FLASH_LOW_POWER 0x00000020 // Flash in low power mode 263 #define SYSCTL_SRAM_NORMAL 0x00000000 // SRAM in normal mode 264 #define SYSCTL_SRAM_STANDBY 0x00000001 // SRAM in standby mode 265 #define SYSCTL_SRAM_LOW_POWER 0x00000003 // SRAM in low power mode 266 267 //***************************************************************************** 268 // 269 // Defines for the SysCtlResetBehaviorSet() and SysCtlResetBehaviorGet() APIs. 270 // 271 //***************************************************************************** 272 #define SYSCTL_ONRST_WDOG0_POR 0x00000030 273 #define SYSCTL_ONRST_WDOG0_SYS 0x00000020 274 #define SYSCTL_ONRST_WDOG1_POR 0x000000C0 275 #define SYSCTL_ONRST_WDOG1_SYS 0x00000080 276 #define SYSCTL_ONRST_BOR_POR 0x0000000C 277 #define SYSCTL_ONRST_BOR_SYS 0x00000008 278 #define SYSCTL_ONRST_EXT_POR 0x00000003 279 #define SYSCTL_ONRST_EXT_SYS 0x00000002 280 281 //***************************************************************************** 282 // 283 // Values used with the SysCtlVoltageEventConfig() API. 284 // 285 //***************************************************************************** 286 #define SYSCTL_VEVENT_VDDABO_NONE \ 287 0x00000000 288 #define SYSCTL_VEVENT_VDDABO_INT \ 289 0x00000100 290 #define SYSCTL_VEVENT_VDDABO_NMI \ 291 0x00000200 292 #define SYSCTL_VEVENT_VDDABO_RST \ 293 0x00000300 294 #define SYSCTL_VEVENT_VDDBO_NONE \ 295 0x00000000 296 #define SYSCTL_VEVENT_VDDBO_INT 0x00000001 297 #define SYSCTL_VEVENT_VDDBO_NMI 0x00000002 298 #define SYSCTL_VEVENT_VDDBO_RST 0x00000003 299 300 //***************************************************************************** 301 // 302 // Values used with the SysCtlVoltageEventStatus() and 303 // SysCtlVoltageEventClear() APIs. 304 // 305 //***************************************************************************** 306 #define SYSCTL_VESTAT_VDDBOR 0x00000040 307 #define SYSCTL_VESTAT_VDDABOR 0x00000010 308 309 //***************************************************************************** 310 // 311 // Values used with the SysCtlNMIStatus() API. 312 // 313 //***************************************************************************** 314 #define SYSCTL_NMI_MOSCFAIL 0x00010000 315 #define SYSCTL_NMI_TAMPER 0x00000200 316 #define SYSCTL_NMI_WDT1 0x00000020 317 #define SYSCTL_NMI_WDT0 0x00000008 318 #define SYSCTL_NMI_POWER 0x00000004 319 #define SYSCTL_NMI_EXTERNAL 0x00000001 320 321 //***************************************************************************** 322 // 323 // The defines for the SysCtlClockOutConfig() API. 324 // 325 //***************************************************************************** 326 #define SYSCTL_CLKOUT_EN 0x80000000 327 #define SYSCTL_CLKOUT_DIS 0x00000000 328 #define SYSCTL_CLKOUT_SYSCLK 0x00000000 329 #define SYSCTL_CLKOUT_PIOSC 0x00010000 330 #define SYSCTL_CLKOUT_MOSC 0x00020000 331 332 //***************************************************************************** 333 // 334 // The following defines are used with the SysCtlAltClkConfig() function. 335 // 336 //***************************************************************************** 337 #define SYSCTL_ALTCLK_PIOSC 0x00000000 338 #define SYSCTL_ALTCLK_RTCOSC 0x00000003 339 #define SYSCTL_ALTCLK_LFIOSC 0x00000004 340 341 //***************************************************************************** 342 // 343 // Prototypes for the APIs. 344 // 345 //***************************************************************************** 346 extern uint32_t SysCtlSRAMSizeGet(void); 347 extern uint32_t SysCtlFlashSizeGet(void); 348 extern uint32_t SysCtlFlashSectorSizeGet(void); 349 extern bool SysCtlPeripheralPresent(uint32_t ui32Peripheral); 350 extern bool SysCtlPeripheralReady(uint32_t ui32Peripheral); 351 extern void SysCtlPeripheralPowerOn(uint32_t ui32Peripheral); 352 extern void SysCtlPeripheralPowerOff(uint32_t ui32Peripheral); 353 extern void SysCtlPeripheralReset(uint32_t ui32Peripheral); 354 extern void SysCtlPeripheralEnable(uint32_t ui32Peripheral); 355 extern void SysCtlPeripheralDisable(uint32_t ui32Peripheral); 356 extern void SysCtlPeripheralSleepEnable(uint32_t ui32Peripheral); 357 extern void SysCtlPeripheralSleepDisable(uint32_t ui32Peripheral); 358 extern void SysCtlPeripheralDeepSleepEnable(uint32_t ui32Peripheral); 359 extern void SysCtlPeripheralDeepSleepDisable(uint32_t ui32Peripheral); 360 extern void SysCtlPeripheralClockGating(bool bEnable); 361 extern void SysCtlIntRegister(void (*pfnHandler)(void)); 362 extern void SysCtlIntUnregister(void); 363 extern void SysCtlIntEnable(uint32_t ui32Ints); 364 extern void SysCtlIntDisable(uint32_t ui32Ints); 365 extern void SysCtlIntClear(uint32_t ui32Ints); 366 extern uint32_t SysCtlIntStatus(bool bMasked); 367 extern void SysCtlLDODeepSleepSet(uint32_t ui32Voltage); 368 extern uint32_t SysCtlLDODeepSleepGet(void); 369 extern void SysCtlSleepPowerSet(uint32_t ui32Config); 370 extern void SysCtlDeepSleepPowerSet(uint32_t ui32Config); 371 extern void SysCtlReset(void); 372 extern void SysCtlSleep(void); 373 extern void SysCtlDeepSleep(void); 374 extern uint32_t SysCtlResetCauseGet(void); 375 extern void SysCtlResetCauseClear(uint32_t ui32Causes); 376 extern void SysCtlBrownOutConfigSet(uint32_t ui32Config, 377 uint32_t ui32Delay); 378 extern void SysCtlDelay(uint32_t ui32Count); 379 extern void SysCtlMOSCConfigSet(uint32_t ui32Config); 380 extern uint32_t SysCtlPIOSCCalibrate(uint32_t ui32Type); 381 extern void SysCtlDeepSleepClockConfigSet(uint32_t ui32Div, 382 uint32_t ui32Config); 383 extern uint32_t SysCtlClockFreqSet(uint32_t ui32Config, 384 uint32_t ui32SysClock); 385 extern void SysCtlResetBehaviorSet(uint32_t ui32Behavior); 386 extern uint32_t SysCtlResetBehaviorGet(void); 387 extern void SysCtlClockOutConfig(uint32_t ui32Config, uint32_t ui32Div); 388 extern void SysCtlAltClkConfig(uint32_t ui32Config); 389 extern uint32_t SysCtlNMIStatus(void); 390 extern void SysCtlNMIClear(uint32_t ui32Status); 391 extern void SysCtlVoltageEventConfig(uint32_t ui32Config); 392 extern uint32_t SysCtlVoltageEventStatus(void); 393 extern void SysCtlVoltageEventClear(uint32_t ui32Status); 394 extern bool SysCtlVCOGet(uint32_t ui32Crystal, uint32_t *pui32VCOFrequency); 395 396 //***************************************************************************** 397 // 398 // Mark the end of the C bindings section for C++ compilers. 399 // 400 //***************************************************************************** 401 #ifdef __cplusplus 402 } 403 #endif 404 405 #endif // __DRIVERLIB_SYSCTL_H__ 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