1 /*
2 * Copyright (c) 2006-2022, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2022-10-19 Nations first version
9 */
10
11 #include "drv_i2c.h"
12
13 #ifdef RT_USING_I2C
14
15 #define DBG_TAG "drv.I2C"
16 #ifdef RT_I2C_DEBUG
17 #define DBG_LVL DBG_LOG
18 #else
19 #define DBG_LVL DBG_INFO
20 #endif
21 #include <rtdbg.h>
22
23
24 #ifdef RT_USING_I2C_BITOPS
25 static const struct n32_soft_i2c_config soft_i2c_config[] =
26 {
27 #ifdef BSP_USING_I2C1
28 I2C1_BUS_CONFIG,
29 #endif
30
31 #ifdef BSP_USING_I2C2
32 I2C2_BUS_CONFIG,
33 #endif
34
35 #ifdef BSP_USING_I2C3
36 I2C3_BUS_CONFIG,
37 #endif
38
39 #ifdef BSP_USING_I2C4
40 I2C4_BUS_CONFIG,
41 #endif
42 };
43
44 static struct n32_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])];
45
46 /**
47 *\*\name n32_i2c_gpio_init
48 *\*\fun Initializes the i2c pin.
49 *\*\param i2c dirver class
50 *\*\return none
51 **/
n32_i2c_gpio_init(struct n32_i2c * i2c)52 static void n32_i2c_gpio_init(struct n32_i2c *i2c)
53 {
54 struct n32_soft_i2c_config* cfg = (struct n32_soft_i2c_config*)i2c->ops.data;
55
56 rt_pin_mode(cfg->scl, PIN_MODE_OUTPUT_OD);
57 rt_pin_mode(cfg->sda, PIN_MODE_OUTPUT_OD);
58
59 rt_pin_write(cfg->scl, PIN_HIGH);
60 rt_pin_write(cfg->sda, PIN_HIGH);
61 }
62
n32_i2c_pin_init(void)63 static void n32_i2c_pin_init(void)
64 {
65 rt_size_t obj_num = sizeof(i2c_obj) / sizeof(struct n32_i2c);
66
67 for(rt_size_t i = 0; i < obj_num; i++)
68 {
69 n32_i2c_gpio_init(&i2c_obj[i]);
70 }
71 }
72
73 /**
74 *\*\name n32_set_sda
75 *\*\fun sets the sda pin.
76 *\*\param data config class
77 *\*\param state sda pin state
78 *\*\return none
79 **/
n32_set_sda(void * data,rt_int32_t state)80 static void n32_set_sda(void *data, rt_int32_t state)
81 {
82 struct n32_soft_i2c_config* cfg = (struct n32_soft_i2c_config*)data;
83 if (state)
84 {
85 rt_pin_write(cfg->sda, PIN_HIGH);
86 }
87 else
88 {
89 rt_pin_write(cfg->sda, PIN_LOW);
90 }
91 }
92
93 /**
94 *\*\name n32_set_scl
95 *\*\fun sets the scl pin.
96 *\*\param data config class
97 *\*\param state scl pin state
98 *\*\return none
99 **/
n32_set_scl(void * data,rt_int32_t state)100 static void n32_set_scl(void *data, rt_int32_t state)
101 {
102 struct n32_soft_i2c_config* cfg = (struct n32_soft_i2c_config*)data;
103 if (state)
104 {
105 rt_pin_write(cfg->scl, PIN_HIGH);
106 }
107 else
108 {
109 rt_pin_write(cfg->scl, PIN_LOW);
110 }
111 }
112
113 /**
114 *\*\name n32_get_sda
115 *\*\fun gets the sda pin state.
116 *\*\param data config class
117 *\*\return sda pin state
118 **/
n32_get_sda(void * data)119 static rt_int32_t n32_get_sda(void *data)
120 {
121 struct n32_soft_i2c_config* cfg = (struct n32_soft_i2c_config*)data;
122 return rt_pin_read(cfg->sda);
123 }
124
125 /**
126 *\*\name n32_get_scl
127 *\*\fun gets the scl pin state.
128 *\*\param data config class
129 *\*\return scl pin state
130 **/
n32_get_scl(void * data)131 static rt_int32_t n32_get_scl(void *data)
132 {
133 struct n32_soft_i2c_config* cfg = (struct n32_soft_i2c_config*)data;
134 return rt_pin_read(cfg->scl);
135 }
136
137
138 /**
139 *\*\name n32_udelay
140 *\*\fun The time delay function.
141 *\*\param us
142 *\*\return none
143 **/
n32_udelay(rt_uint32_t us)144 static void n32_udelay(rt_uint32_t us)
145 {
146 rt_uint32_t ticks;
147 rt_uint32_t told, tnow, tcnt = 0;
148 rt_uint32_t reload = SysTick->LOAD;
149
150 ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
151 told = SysTick->VAL;
152
153 while (1)
154 {
155 tnow = SysTick->VAL;
156 if (tnow != told)
157 {
158 if (tnow < told)
159 {
160 tcnt += told - tnow;
161 }
162 else
163 {
164 tcnt += reload - tnow + told;
165 }
166 told = tnow;
167
168 if (tcnt >= ticks)
169 {
170 break;
171 }
172 }
173 }
174 }
175
176 static const struct rt_i2c_bit_ops n32_bit_ops_default =
177 {
178 .data = RT_NULL,
179 .pin_init = n32_i2c_pin_init,
180 .set_sda = n32_set_sda,
181 .set_scl = n32_set_scl,
182 .get_sda = n32_get_sda,
183 .get_scl = n32_get_scl,
184 .udelay = n32_udelay,
185 .delay_us = 1,
186 .timeout = 100,
187 .i2c_pin_init_flag = RT_FALSE
188 };
189
190
191 /**
192 *\*\name n32_i2c_bus_unlock
193 *\*\fun If i2c is locked, this function will unlock it.
194 *\*\param cfg
195 *\*\return RT_EOK indicates successful unlock
196 **/
n32_i2c_bus_unlock(const struct n32_soft_i2c_config * cfg)197 static rt_err_t n32_i2c_bus_unlock(const struct n32_soft_i2c_config *cfg)
198 {
199 rt_int32_t i = 0;
200
201 if (PIN_LOW == rt_pin_read(cfg->sda))
202 {
203 while (i++ < 9)
204 {
205 rt_pin_write(cfg->scl, PIN_HIGH);
206 n32_udelay(100);
207 rt_pin_write(cfg->scl, PIN_LOW);
208 n32_udelay(100);
209 }
210 }
211
212 if (PIN_LOW == rt_pin_read(cfg->sda))
213 {
214 return -RT_ERROR;
215 }
216
217 return RT_EOK;
218 }
219 #endif /* RT_USING_I2C_BITOPS */
220
221 #ifdef RT_USING_HARDWARE_I2C
222
223 #define I2CT_FLAG_TIMEOUT ((uint32_t)0x1000)
224 #define I2CT_LONG_TIMEOUT ((uint32_t)(10 * I2CT_FLAG_TIMEOUT))
225
226 static uint32_t I2CTimeout = I2CT_LONG_TIMEOUT;
227
rt_i2c_read(rt_uint32_t i2c_periph,rt_uint16_t slave_address,rt_uint8_t * p_buffer,rt_uint16_t data_byte)228 static int rt_i2c_read(rt_uint32_t i2c_periph, rt_uint16_t slave_address, rt_uint8_t* p_buffer, rt_uint16_t data_byte)
229 {
230 I2CTimeout = I2CT_LONG_TIMEOUT;
231 /* wait until I2C bus is idle */
232 while (I2C_GetFlag((I2C_Module*)i2c_periph, I2C_FLAG_BUSY))
233 {
234 if ((I2CTimeout--) == 0)
235 return 9;
236 };
237
238 I2C_ConfigAck((I2C_Module*)i2c_periph, ENABLE);
239
240 /** Send START condition */
241 I2C_GenerateStart((I2C_Module*)i2c_periph, ENABLE);
242
243 I2CTimeout = I2CT_LONG_TIMEOUT;
244 /* wait until SBSEND bit is set */
245 while (!I2C_CheckEvent((I2C_Module*)i2c_periph, I2C_EVT_MASTER_MODE_FLAG)) // EV5
246 {
247 if ((I2CTimeout--) == 0)
248 return 10;
249 };
250
251 /* send slave address to I2C bus */
252 I2C_SendAddr7bit((I2C_Module*)i2c_periph, slave_address, I2C_DIRECTION_RECV);
253
254 I2CTimeout = I2CT_LONG_TIMEOUT;
255 while (!I2C_CheckEvent((I2C_Module*)i2c_periph, I2C_EVT_MASTER_RXMODE_FLAG)) // EV6
256 {
257 if ((I2CTimeout--) == 0)
258 return 6;
259 };
260
261 /* while there is data to be read */
262 while (data_byte)
263 {
264 /* wait until the RBNE bit is set and clear it */
265 if (I2C_GetFlag((I2C_Module*)i2c_periph, I2C_FLAG_RXDATNE))
266 {
267 /* read a byte*/
268 *p_buffer = I2C_RecvData((I2C_Module*)i2c_periph);
269
270 /* point to the next location where the byte read will be saved */
271 p_buffer++;
272
273 /* decrement the read bytes counter */
274 data_byte--;
275 if (1 == data_byte)
276 {
277 /* disable acknowledge */
278 I2C_ConfigAck((I2C_Module*)i2c_periph, DISABLE);
279 /* send a stop condition to I2C bus */
280 I2C_GenerateStop((I2C_Module*)i2c_periph, ENABLE);
281 }
282 }
283 }
284
285 /* wait until the stop condition is finished */
286 while (I2C_GetFlag((I2C_Module*)i2c_periph, I2C_FLAG_STOPF))
287 {
288 if ((I2CTimeout--) == 0)
289 return 7;
290 };
291
292 /* enable acknowledge */
293 I2C_ConfigAck((I2C_Module*)i2c_periph, ENABLE);
294
295 I2C_ConfigNackLocation((I2C_Module*)i2c_periph,I2C_NACK_POS_CURRENT);
296
297 return 0;
298 }
299
rt_i2c_write(rt_uint32_t i2c_periph,uint16_t slave_address,uint8_t * p_buffer,uint16_t data_byte)300 static int rt_i2c_write(rt_uint32_t i2c_periph, uint16_t slave_address, uint8_t* p_buffer, uint16_t data_byte)
301 {
302 uint8_t* sendBufferPtr = p_buffer;
303 I2CTimeout = I2CT_LONG_TIMEOUT;
304 while (I2C_GetFlag((I2C_Module*)i2c_periph, I2C_FLAG_BUSY))
305 {
306 if ((I2CTimeout--) == 0)
307 return 4;
308 };
309
310 I2C_ConfigAck((I2C_Module*)i2c_periph, ENABLE);
311 I2C_GenerateStart((I2C_Module*)i2c_periph, ENABLE);
312 I2CTimeout = I2CT_LONG_TIMEOUT;
313 while (!I2C_CheckEvent((I2C_Module*)i2c_periph, I2C_EVT_MASTER_MODE_FLAG)) // EV5
314 {
315 if ((I2CTimeout--) == 0)
316 return 5;
317 };
318
319 I2C_SendAddr7bit((I2C_Module*)i2c_periph, slave_address, I2C_DIRECTION_SEND);
320 I2CTimeout = I2CT_LONG_TIMEOUT;
321 while (!I2C_CheckEvent((I2C_Module*)i2c_periph, I2C_EVT_MASTER_TXMODE_FLAG)) // EV6
322 {
323 if ((I2CTimeout--) == 0)
324 return 6;
325 };
326
327 /* send data */
328 while (data_byte-- > 0)
329 {
330 I2C_SendData((I2C_Module*)i2c_periph, *sendBufferPtr++);
331 I2CTimeout = I2CT_LONG_TIMEOUT;
332 while (!I2C_CheckEvent((I2C_Module*)i2c_periph, I2C_EVT_MASTER_DATA_SENDING)) // EV8
333 {
334 if ((I2CTimeout--) == 0)
335 return 7;
336 };
337 };
338
339 I2CTimeout = I2CT_LONG_TIMEOUT;
340 while (!I2C_CheckEvent((I2C_Module*)i2c_periph, I2C_EVT_MASTER_DATA_SENDED)) // EV8-2
341 {
342 if ((I2CTimeout--) == 0)
343 return 8;
344 };
345 I2C_GenerateStop((I2C_Module*)i2c_periph, ENABLE);
346 return 0;
347 }
348
349
350
rt_i2c_xfer(struct rt_i2c_bus_device * bus,struct rt_i2c_msg msgs[],rt_uint32_t num)351 static rt_ssize_t rt_i2c_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num)
352 {
353 struct rt_i2c_msg *msg;
354 rt_uint32_t i;
355 rt_err_t ret = -RT_ERROR;
356
357 struct rt_i2c_bus *rt_i2c = (struct rt_i2c_bus *)bus;
358
359 for (i = 0; i < num; i++)
360 {
361 msg = &msgs[i];
362
363 if (msg->flags & RT_I2C_RD)
364 {
365 if (rt_i2c_read(rt_i2c->i2c_periph, msg->addr, msg->buf, msg->len) != 0)
366 {
367 LOG_E("i2c bus write failed,i2c bus stop!");
368 goto out;
369 }
370 }
371 else
372 {
373 if (rt_i2c_write(rt_i2c->i2c_periph, msg->addr, msg->buf, msg->len) != 0)
374 {
375 LOG_E("i2c bus write failed,i2c bus stop!");
376 goto out;
377 }
378 }
379 }
380
381 ret = i;
382 return ret;
383
384 out:
385 LOG_E("send stop condition\n");
386
387 return ret;
388 }
389
390 static const struct rt_i2c_bus_device_ops i2c_ops =
391 {
392 rt_i2c_xfer,
393 RT_NULL,
394 RT_NULL
395 };
396
397 #endif /* RT_USING_HARDWARE_I2C */
398
rt_hw_i2c_init(void)399 int rt_hw_i2c_init(void)
400 {
401 #ifdef RT_USING_I2C_BITOPS
402
403 rt_size_t obj_num = sizeof(i2c_obj) / sizeof(struct n32_i2c);
404 rt_err_t result;
405
406 for(rt_size_t i = 0; i < obj_num; i++)
407 {
408 i2c_obj[i].ops = n32_bit_ops_default;
409 i2c_obj[i].ops.data = (void*)&soft_i2c_config[i];
410 i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops;
411
412 result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name);
413
414 RT_ASSERT(result == RT_EOK);
415 n32_i2c_bus_unlock(&soft_i2c_config[i]);
416
417 rt_kprintf("software simulation %s init done, pin scl: %d, pin sda %d",
418 soft_i2c_config[i].bus_name,
419 soft_i2c_config[i].scl,
420 soft_i2c_config[i].sda);
421 }
422 #endif /* RT_USING_I2C_BITOPS */
423
424 #ifdef RT_USING_HARDWARE_I2C
425
426 GPIO_InitType GPIO_InitStructure;
427 I2C_InitType I2C_InitStructure;
428 #ifdef BSP_USING_I2C1
429 #define I2C1_SPEED 400000
430
431 static struct rt_i2c_bus i2c_bus1;
432
433 #if defined(SOC_N32G45X) || defined(SOC_N32WB452)
434 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB | RCC_APB2_PERIPH_AFIO, ENABLE);
435 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_I2C1, ENABLE);
436
437 GPIO_InitStruct(&GPIO_InitStructure);
438 /* connect PB8 to I2C1_SCL, PB9 to I2C1_SDA */
439 GPIO_InitStructure.Pin = GPIO_PIN_8 | GPIO_PIN_9;
440 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
441 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
442 GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
443
444 GPIO_ConfigPinRemap(GPIO_RMP_I2C1, ENABLE);
445 #elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
446 /* Enable I2C clock */
447 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_I2C1, ENABLE);
448 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB | RCC_APB2_PERIPH_AFIO, ENABLE);
449
450 GPIO_InitStruct(&GPIO_InitStructure);
451 /* Confige I2C1_SCL(PB8) and I2C1_SDA(PB9) */
452 GPIO_InitStructure.Pin = GPIO_PIN_8 | GPIO_PIN_9;
453 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
454 GPIO_InitStructure.GPIO_Pull = GPIO_Pull_Up;
455 GPIO_InitStructure.GPIO_Alternate = GPIO_AF4_I2C1;
456 GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
457 #endif
458
459 I2C_DeInit(I2C1);
460 I2C_InitStructure.BusMode = I2C_BUSMODE_I2C;
461 I2C_InitStructure.FmDutyCycle = I2C_FMDUTYCYCLE_2;
462 I2C_InitStructure.OwnAddr1 = 0xff;
463 I2C_InitStructure.AckEnable = I2C_ACKEN;
464 I2C_InitStructure.AddrMode = I2C_ADDR_MODE_7BIT;
465 I2C_InitStructure.ClkSpeed = I2C1_SPEED; // 400000 400K
466
467 I2C_Init(I2C1, &I2C_InitStructure);
468
469 rt_memset((void *)&i2c_bus1, 0, sizeof(struct rt_i2c_bus));
470 i2c_bus1.parent.ops = &i2c_ops;
471 i2c_bus1.i2c_periph = (rt_uint32_t)I2C1;
472 rt_i2c_bus_device_register(&i2c_bus1.parent, "i2c1");
473 #endif
474
475 #ifdef BSP_USING_I2C2
476 #define I2C2_SPEED 100000
477
478 static struct rt_i2c_bus i2c_bus2;
479
480 #if defined(SOC_N32G45X) || defined(SOC_N32WB452)
481 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
482 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_I2C2, ENABLE);
483
484 GPIO_InitStruct(&GPIO_InitStructure);
485 /* connect PB10 to I2C2_SCL, PB11 to I2C2_SDA */
486 GPIO_InitStructure.Pin = GPIO_PIN_10 | GPIO_PIN_11;
487 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
488 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
489 GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
490 #elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
491 /* Enable I2C clock */
492 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_I2C2, ENABLE);
493 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB | RCC_APB2_PERIPH_AFIO, ENABLE);
494
495 GPIO_InitStruct(&GPIO_InitStructure);
496 /* Confige I2C1_SCL(PB10) and I2C1_SDA(PB11) */
497 GPIO_InitStructure.Pin = GPIO_PIN_10 | GPIO_PIN_11;
498 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
499 GPIO_InitStructure.GPIO_Pull = GPIO_Pull_Up;
500 GPIO_InitStructure.GPIO_Alternate = GPIO_AF6_I2C2;
501 GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
502 #endif
503
504 I2C_DeInit(I2C2);
505 I2C_InitStructure.BusMode = I2C_BUSMODE_I2C;
506 I2C_InitStructure.FmDutyCycle = I2C_FMDUTYCYCLE_2;
507 I2C_InitStructure.OwnAddr1 = 0xff;
508 I2C_InitStructure.AckEnable = I2C_ACKEN;
509 I2C_InitStructure.AddrMode = I2C_ADDR_MODE_7BIT;
510 I2C_InitStructure.ClkSpeed = I2C2_SPEED; // 100000 100K
511
512 I2C_Init(I2C2, &I2C_InitStructure);
513
514 rt_memset((void *)&i2c_bus2, 0, sizeof(struct rt_i2c_bus));
515 i2c_bus2.parent.ops = &i2c_ops;
516 i2c_bus2.i2c_periph = (rt_uint32_t)I2C2;
517 rt_i2c_bus_device_register(&i2c_bus2.parent, "i2c2");
518 #endif
519
520 #if defined(SOC_N32G45X) || defined(SOC_N32WB452)
521 #ifdef BSP_USING_I2C3
522 #define I2C3_SPEED 100000
523
524 static struct rt_i2c_bus i2c_bus3;
525
526 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE);
527 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_I2C3, ENABLE);
528
529 GPIO_InitStruct(&GPIO_InitStructure);
530 /* connect PC0 to I2C3_SCL, PC1 to I2C3_SDA */
531 GPIO_InitStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1;
532 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
533 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
534 GPIO_InitPeripheral(GPIOC, &GPIO_InitStructure);
535
536 I2C_DeInit(I2C3);
537 I2C_InitStructure.BusMode = I2C_BUSMODE_I2C;
538 I2C_InitStructure.FmDutyCycle = I2C_FMDUTYCYCLE_2;
539 I2C_InitStructure.OwnAddr1 = 0xff;
540 I2C_InitStructure.AckEnable = I2C_ACKEN;
541 I2C_InitStructure.AddrMode = I2C_ADDR_MODE_7BIT;
542 I2C_InitStructure.ClkSpeed = I2C3_SPEED; // 100000 100K
543
544 I2C_Init(I2C3, &I2C_InitStructure);
545
546 rt_memset((void *)&i2c_bus3, 0, sizeof(struct rt_i2c_bus));
547 i2c_bus3.parent.ops = &i2c_ops;
548 i2c_bus3.i2c_periph = (rt_uint32_t)I2C3;
549 rt_i2c_bus_device_register(&i2c_bus3.parent, "i2c3");
550 #endif
551
552 #ifdef BSP_USING_I2C4
553 #define I2C4_SPEED 100000
554
555 static struct rt_i2c_bus i2c_bus4;
556
557 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE);
558 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_I2C4, ENABLE);
559
560 GPIO_InitStruct(&GPIO_InitStructure);
561 /* connect PC6 to I2C4_SCL, PC7 to I2C4_SDA */
562 GPIO_InitStructure.Pin = GPIO_PIN_6 | GPIO_PIN_7;
563 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
564 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
565 GPIO_InitPeripheral(GPIOC, &GPIO_InitStructure);
566
567 I2C_DeInit(I2C4);
568 I2C_InitStructure.BusMode = I2C_BUSMODE_I2C;
569 I2C_InitStructure.FmDutyCycle = I2C_FMDUTYCYCLE_2;
570 I2C_InitStructure.OwnAddr1 = 0xff;
571 I2C_InitStructure.AckEnable = I2C_ACKEN;
572 I2C_InitStructure.AddrMode = I2C_ADDR_MODE_7BIT;
573 I2C_InitStructure.ClkSpeed = I2C4_SPEED; // 100000 100K
574
575 I2C_Init(I2C4, &I2C_InitStructure);
576
577 rt_memset((void *)&i2c_bus4, 0, sizeof(struct rt_i2c_bus));
578 i2c_bus4.parent.ops = &i2c_ops;
579 i2c_bus4.i2c_periph = (rt_uint32_t)I2C4;
580 rt_i2c_bus_device_register(&i2c_bus4.parent, "i2c4");
581 #endif
582 #endif
583 #endif /* RT_USING_HARDWARE_I2C */
584
585 return RT_EOK;
586 }
587 INIT_DEVICE_EXPORT(rt_hw_i2c_init);
588
589 #endif
590 /* end of i2c driver */
591