1 /*
2 * Copyright (c) 2006-2022, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2022-10-19 Nations first version
9 */
10
11 #include "drv_spi.h"
12
13 #if defined(RT_USING_SPI) && defined(RT_USING_PIN)
14 #include <rtdevice.h>
15
16 #if defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2) || \
17 defined(BSP_USING_SPI3)
18
19 /* #define DEBUG */
20 #ifdef DEBUG
21 #define DEBUG_PRINTF(...) rt_kprintf(__VA_ARGS__)
22 #else
23 #define DEBUG_PRINTF(...)
24 #endif
25
26 /* private rt-thread spi ops function */
27
configure(struct rt_spi_device * device,struct rt_spi_configuration * configuration)28 static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configuration* configuration)
29 {
30 SPI_InitType SPI_InitStructure;
31 RCC_ClocksType RCC_ClockFreq;
32 SPI_Module* spi_periph;
33
34 RT_ASSERT(device != RT_NULL);
35 RT_ASSERT(configuration != RT_NULL);
36
37 RCC_GetClocksFreqValue(&RCC_ClockFreq);
38
39 spi_periph = (SPI_Module*)device->bus->parent.user_data;
40
41 #if defined(SOC_N32G45X) || defined(SOC_N32WB452) || defined(SOC_N32G4FR)
42 if (spi_periph != SPI1 && spi_periph != SPI2 && spi_periph != SPI3)
43 {
44 return -RT_EIO;
45 }
46 #elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
47 if (spi_periph != SPI1 && spi_periph != SPI2)
48 {
49 return -RT_EIO;
50 }
51 #endif
52
53 if (configuration->data_width <= 8)
54 {
55 SPI_InitStructure.DataLen = SPI_DATA_SIZE_8BITS;
56 }
57 else if (configuration->data_width <= 16)
58 {
59 SPI_InitStructure.DataLen = SPI_DATA_SIZE_16BITS;
60 }
61 else
62 {
63 return -RT_EIO;
64 }
65
66 {
67 rt_uint32_t spi_apb_clock;
68 rt_uint32_t max_hz;
69
70 max_hz = configuration->max_hz;
71
72 DEBUG_PRINTF("sys freq: %d\n", RCC_ClockFreq.SysclkFreq);
73 DEBUG_PRINTF("CK_APB2 freq: %d\n", RCC_ClockFreq.Pclk2Freq);
74 DEBUG_PRINTF("max freq: %d\n", max_hz);
75
76 if (spi_periph == SPI1)
77 {
78 spi_apb_clock = RCC_ClockFreq.Pclk2Freq;
79 }
80 else
81 {
82 spi_apb_clock = RCC_ClockFreq.Pclk1Freq;
83 }
84
85 if (max_hz >= spi_apb_clock/2)
86 {
87 SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_2;
88 }
89 else if (max_hz >= spi_apb_clock/4)
90 {
91 SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_4;
92 }
93 else if (max_hz >= spi_apb_clock/8)
94 {
95 SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_8;
96 }
97 else if (max_hz >= spi_apb_clock/16)
98 {
99 SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_16;
100 }
101 else if (max_hz >= spi_apb_clock/32)
102 {
103 SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_32;
104 }
105 else if (max_hz >= spi_apb_clock/64)
106 {
107 SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_64;
108 }
109 else if (max_hz >= spi_apb_clock/128)
110 {
111 SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_128;
112 }
113 else
114 {
115 /* min prescaler 256 */
116 SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_256;
117 }
118 } /* baudrate */
119
120 switch (configuration->mode & RT_SPI_MODE_3)
121 {
122 case RT_SPI_MODE_0:
123 SPI_InitStructure.CLKPOL = SPI_CLKPOL_LOW;
124 SPI_InitStructure.CLKPHA = SPI_CLKPHA_FIRST_EDGE;
125 break;
126 case RT_SPI_MODE_1:
127 SPI_InitStructure.CLKPOL = SPI_CLKPOL_LOW;
128 SPI_InitStructure.CLKPHA = SPI_CLKPHA_SECOND_EDGE;
129 break;
130 case RT_SPI_MODE_2:
131 SPI_InitStructure.CLKPOL = SPI_CLKPOL_HIGH;
132 SPI_InitStructure.CLKPHA = SPI_CLKPHA_FIRST_EDGE;
133 break;
134 case RT_SPI_MODE_3:
135 SPI_InitStructure.CLKPOL = SPI_CLKPOL_HIGH;
136 SPI_InitStructure.CLKPHA = SPI_CLKPHA_SECOND_EDGE;
137 break;
138 }
139
140 /* MSB or LSB */
141 if (configuration->mode & RT_SPI_MSB)
142 {
143 SPI_InitStructure.FirstBit = SPI_FB_MSB;
144 }
145 else
146 {
147 SPI_InitStructure.FirstBit = SPI_FB_LSB;
148 }
149 /* SPI configuration */
150 SPI_InitStructure.DataDirection = SPI_DIR_DOUBLELINE_FULLDUPLEX;
151 SPI_InitStructure.SpiMode = SPI_MODE_MASTER;
152 SPI_InitStructure.NSS = SPI_NSS_SOFT;
153 SPI_InitStructure.CRCPoly = 7;
154
155 SPI_Init(spi_periph, &SPI_InitStructure);
156
157 /* Enable the sFLASH_SPI */
158 SPI_Enable(spi_periph, ENABLE);
159
160 return RT_EOK;
161 }
162
xfer(struct rt_spi_device * device,struct rt_spi_message * message)163 static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* message)
164 {
165 struct n32_spi_cs *cs_pin = device->parent.user_data;
166 SPI_Module* spi_periph = (SPI_Module*)device->bus->parent.user_data;
167 struct rt_spi_configuration * config = &device->config;
168
169 RT_ASSERT(device != NULL);
170 RT_ASSERT(message != NULL);
171
172 /* take CS */
173 if (message->cs_take)
174 {
175 rt_pin_write(cs_pin->GPIO_Pin, PIN_LOW);
176 DEBUG_PRINTF("spi take cs\n");
177 }
178
179 if (config->data_width <= 8)
180 {
181 const rt_uint8_t * send_ptr = message->send_buf;
182 rt_uint8_t * recv_ptr = message->recv_buf;
183 rt_uint32_t size = message->length;
184
185 DEBUG_PRINTF("spi poll transfer start: %d\n", size);
186
187 while (size--)
188 {
189 rt_uint8_t data = 0xA5;
190
191 if (send_ptr != RT_NULL)
192 {
193 data = *send_ptr++;
194 }
195
196 /* Loop while DAT register in not emplty */
197 while (SPI_I2S_GetStatus(spi_periph, SPI_I2S_TE_FLAG) == RESET);
198
199 /* Send the byte */
200 SPI_I2S_TransmitData(spi_periph, data);
201
202 /* Wait until a data is received */
203 while (SPI_I2S_GetStatus(spi_periph, SPI_I2S_RNE_FLAG) == RESET);
204
205 /* Get the received data */
206 data = SPI_I2S_ReceiveData(spi_periph);
207
208 if (recv_ptr != RT_NULL)
209 {
210 *recv_ptr++ = data;
211 }
212 }
213 DEBUG_PRINTF("spi poll transfer finsh\n");
214 }
215 else if (config->data_width <= 16)
216 {
217 const rt_uint16_t * send_ptr = message->send_buf;
218 rt_uint16_t * recv_ptr = message->recv_buf;
219 rt_uint32_t size = message->length;
220
221 while (size--)
222 {
223 rt_uint16_t data = 0xFF;
224
225 if (send_ptr != RT_NULL)
226 {
227 data = *send_ptr++;
228 }
229
230 /* Loop while DAT register in not emplty */
231 while (SPI_I2S_GetStatus(spi_periph, SPI_I2S_TE_FLAG) == RESET);
232
233 /* Send the byte */
234 SPI_I2S_TransmitData(spi_periph, data);
235
236 /* Wait until a data is received */
237 while (RESET == SPI_I2S_GetStatus(spi_periph, SPI_I2S_RNE_FLAG));
238
239 /* Get the received data */
240 data = SPI_I2S_ReceiveData(spi_periph);
241
242 if (recv_ptr != RT_NULL)
243 {
244 *recv_ptr++ = data;
245 }
246 }
247 }
248
249 /* release CS */
250 if (message->cs_release)
251 {
252 rt_pin_write(cs_pin->GPIO_Pin, PIN_HIGH);
253 DEBUG_PRINTF("spi release cs\n");
254 }
255
256 return message->length;
257 }
258
259 static struct rt_spi_ops spi_ops =
260 {
261 configure,
262 xfer
263 };
264
rt_hw_spi_init(void)265 int rt_hw_spi_init(void)
266 {
267 int result = 0;
268 GPIO_InitType GPIO_InitStructure;
269
270 #ifdef BSP_USING_SPI1
271 static struct rt_spi_bus spi_bus1;
272 spi_bus1.parent.user_data = (void *)SPI1;
273
274 result = rt_spi_bus_register(&spi_bus1, "spi1", &spi_ops);
275
276 #if defined(SOC_N32G45X) || defined(SOC_N32WB452) || defined(SOC_N32G4FR)
277 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA | RCC_APB2_PERIPH_SPI1, ENABLE);
278
279 GPIO_InitStruct(&GPIO_InitStructure);
280
281 /* Confige SPI1_SCLK(PA5) and SPI1_MOSI(PA7) */
282 GPIO_InitStructure.Pin = GPIO_PIN_5 | GPIO_PIN_7;
283 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
284 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
285 GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure);
286
287 /* Confige SPI1_MISO(PA6) */
288 GPIO_InitStructure.Pin = GPIO_PIN_6;
289 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
290 GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure);
291 #elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
292 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
293 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_SPI1 | RCC_APB2_PERIPH_AFIO, ENABLE);
294
295 GPIO_InitStruct(&GPIO_InitStructure);
296 /* Confige SPI1_SCLK(PA5) and SPI1_MISO(PA6) and SPI1_MOSI(PA7) */
297 GPIO_InitStructure.Pin = GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7;
298 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
299 GPIO_InitStructure.GPIO_Alternate = GPIO_AF0_SPI1;
300 GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure);
301 #endif
302 #endif
303
304 #ifdef BSP_USING_SPI2
305 static struct rt_spi_bus spi_bus2;
306 spi_bus2.parent.user_data = (void *)SPI2;
307
308 result = rt_spi_bus_register(&spi_bus2, "spi2", &spi_ops);
309
310 #if defined(SOC_N32G45X) || defined(SOC_N32WB452) || defined(SOC_N32G4FR)
311 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
312 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_SPI2, ENABLE);
313
314 GPIO_InitStruct(&GPIO_InitStructure);
315
316 /* Confige SPI2_SCLK(PB13) and SPI2_MOSI(PB15) */
317 GPIO_InitStructure.Pin = GPIO_PIN_13 | GPIO_PIN_15;
318 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
319 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
320 GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
321
322 /* Confige SPI2_MISO(PB14) */
323 GPIO_InitStructure.Pin = GPIO_PIN_14;
324 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
325 GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
326 #elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
327 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
328 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_SPI2 | RCC_APB2_PERIPH_AFIO, ENABLE);
329
330 GPIO_InitStruct(&GPIO_InitStructure);
331 /* Confige SPI2_SCLK(PB13) and SPI2_MISO(PB14) and SPI2_MOSI(PB15) */
332 GPIO_InitStructure.Pin = GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
333 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
334 GPIO_InitStructure.GPIO_Alternate = GPIO_AF0_SPI2;
335 GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
336 #endif
337 #endif
338
339 #ifdef BSP_USING_SPI3
340 static struct rt_spi_bus spi_bus3;
341 spi_bus3.parent.user_data = (void *)SPI3;
342
343 result = rt_spi_bus_register(&spi_bus3, "spi3", &spi_ops);
344
345 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB | RCC_APB2_PERIPH_AFIO, ENABLE);
346 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_SPI3, ENABLE);
347
348 GPIO_ConfigPinRemap(GPIO_RMP_SW_JTAG_SW_ENABLE, ENABLE);
349
350 GPIO_InitStruct(&GPIO_InitStructure);
351
352 /* Confige SPI3_SCLK(PB3) and SPI3_MOSI(PB5) */
353 GPIO_InitStructure.Pin = GPIO_PIN_3 | GPIO_PIN_5;
354 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
355 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
356 GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
357
358 /* Confige SPI3_MISO(PB4) */
359 GPIO_InitStructure.Pin = GPIO_PIN_4;
360 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
361 GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
362 #endif
363 return result;
364 }
365 INIT_BOARD_EXPORT(rt_hw_spi_init);
366
367 #endif /* defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2) || defined(BSP_USING_SPI3) */
368 #endif
369