1/**************************************************************************//** 2* 3* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved. 4* 5* SPDX-License-Identifier: Apache-2.0 6* 7* Change Logs: 8* Date Author Notes 9* 2021-07-19 Wayne First version 10* 11******************************************************************************/ 12 13/* Program Entry, set to mark it as "used" and avoid gc */ 14MEMORY 15{ 16 SRAM0_DDR (rxw) : ORIGIN = 0x00000000, LENGTH = 4096k /* 128K SRAM0 + 3.8MB DDR */ 17} 18ENTRY(Reset_Handler) 19_system_stack_size = 0x1000; 20 21SECTIONS 22{ 23 .vector : 24 { 25 . = ALIGN(4); 26 _stext = .; 27 KEEP(*(.isr_vector)) /* Startup code */ 28 } > SRAM0_DDR = 0 29 30 .text : 31 { 32 . = ALIGN(4); 33 *(.text) /* remaining code */ 34 *(.text.*) /* remaining code */ 35 *(.rodata) /* read-only data (constants) */ 36 *(.rodata*) 37 *(.glue_7) 38 *(.glue_7t) 39 *(.gnu.linkonce.t*) 40 41 /* section information for finsh shell */ 42 . = ALIGN(4); 43 __fsymtab_start = .; 44 KEEP(*(FSymTab)) 45 __fsymtab_end = .; 46 . = ALIGN(4); 47 __vsymtab_start = .; 48 KEEP(*(VSymTab)) 49 __vsymtab_end = .; 50 . = ALIGN(4); 51 52 /* section information for initial. */ 53 . = ALIGN(4); 54 __rt_init_start = .; 55 KEEP(*(SORT(.rti_fn*))) 56 __rt_init_end = .; 57 . = ALIGN(4); 58 59 /* section information for utest */ 60 . = ALIGN(4); 61 __rt_utest_tc_tab_start = .; 62 KEEP(*(UtestTcTab)) 63 __rt_utest_tc_tab_end = .; 64 65 . = ALIGN(4); 66 _etext = .; 67 } > SRAM0_DDR 68 69 /* .ARM.exidx is sorted, so has to go in its own output section. */ 70 __exidx_start = .; 71 .ARM.exidx : 72 { 73 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 74 75 /* This is used by the startup in order to initialize the .data section */ 76 _sidata = .; 77 } > SRAM0_DDR 78 __exidx_end = .; 79 80 /* .data section which is used for initialized data */ 81 82 .stack : 83 { 84 _sstack = .; 85 . = . + _system_stack_size; 86 . = ALIGN(4); 87 _estack = .; 88 } > SRAM0_DDR 89 90 .data : AT (_sidata) 91 { 92 . = ALIGN(4); 93 /* This is used by the startup in order to initialize the .data section */ 94 _sdata = . ; 95 96 *(.data) 97 *(.data.*) 98 *(.gnu.linkonce.d*) 99 100 . = ALIGN(4); 101 /* This is used by the startup in order to initialize the .data section */ 102 _edata = . ; 103 } > SRAM0_DDR 104 105 __bss_start = .; 106 .bss : 107 { 108 . = ALIGN(4); 109 /* This is used by the startup in order to initialize the .bss section */ 110 _sbss = .; 111 112 *(.bss) 113 *(.bss.*) 114 *(COMMON) 115 116 . = ALIGN(4); 117 /* This is used by the startup in order to initialize the .bss section */ 118 _ebss = . ; 119 120 *(.bss.init) 121 } > SRAM0_DDR 122 __bss_end = .; 123 _end = .; 124 125 __ram_top = ORIGIN(SRAM0_DDR) + LENGTH(SRAM0_DDR); 126 127 /* Stabs debugging sections. */ 128 .stab 0 : { *(.stab) } 129 .stabstr 0 : { *(.stabstr) } 130 .stab.excl 0 : { *(.stab.excl) } 131 .stab.exclstr 0 : { *(.stab.exclstr) } 132 .stab.index 0 : { *(.stab.index) } 133 .stab.indexstr 0 : { *(.stab.indexstr) } 134 .comment 0 : { *(.comment) } 135 /* DWARF debug sections. 136 * Symbols in the DWARF debugging sections are relative to the beginning 137 * of the section so we begin them at 0. */ 138 /* DWARF 1 */ 139 .debug 0 : { *(.debug) } 140 .line 0 : { *(.line) } 141 /* GNU DWARF 1 extensions */ 142 .debug_srcinfo 0 : { *(.debug_srcinfo) } 143 .debug_sfnames 0 : { *(.debug_sfnames) } 144 /* DWARF 1.1 and DWARF 2 */ 145 .debug_aranges 0 : { *(.debug_aranges) } 146 .debug_pubnames 0 : { *(.debug_pubnames) } 147 /* DWARF 2 */ 148 .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } 149 .debug_abbrev 0 : { *(.debug_abbrev) } 150 .debug_line 0 : { *(.debug_line) } 151 .debug_frame 0 : { *(.debug_frame) } 152 .debug_str 0 : { *(.debug_str) } 153 .debug_loc 0 : { *(.debug_loc) } 154 .debug_macinfo 0 : { *(.debug_macinfo) } 155 /* SGI/MIPS DWARF 2 extensions */ 156 .debug_weaknames 0 : { *(.debug_weaknames) } 157 .debug_funcnames 0 : { *(.debug_funcnames) } 158 .debug_typenames 0 : { *(.debug_typenames) } 159 .debug_varnames 0 : { *(.debug_varnames) } 160} 161