1 /**************************************************************************//**
2 *
3 * @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 *
7 * Change Logs:
8 * Date            Author       Notes
9 * 2020-1-16       Wayne        First version
10 *
11 ******************************************************************************/
12 
13 #include <rtdevice.h>
14 #include <drv_gpio.h>
15 
16 #if defined(BOARD_USING_STORAGE_SPIFLASH)
17 #if defined(RT_USING_SFUD)
18     #include "dev_spi_flash.h"
19     #include "dev_spi_flash_sfud.h"
20 #endif
21 
22 #include "drv_qspi.h"
23 
24 #define W25X_REG_READSTATUS    (0x05)
25 #define W25X_REG_READSTATUS2   (0x35)
26 #define W25X_REG_WRITEENABLE   (0x06)
27 #define W25X_REG_WRITESTATUS   (0x01)
28 #define W25X_REG_QUADENABLE    (0x02)
29 
SpiFlash_ReadStatusReg(struct rt_qspi_device * qspi_device)30 static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device)
31 {
32     rt_uint8_t u8Val;
33     rt_err_t result = RT_EOK;
34     rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS;
35 
36     result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
37     RT_ASSERT(result > 0);
38 
39     return u8Val;
40 }
41 
SpiFlash_ReadStatusReg2(struct rt_qspi_device * qspi_device)42 static rt_uint8_t SpiFlash_ReadStatusReg2(struct rt_qspi_device *qspi_device)
43 {
44     rt_uint8_t u8Val;
45     rt_err_t result = RT_EOK;
46     rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS2;
47 
48     result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
49     RT_ASSERT(result > 0);
50 
51     return u8Val;
52 }
53 
SpiFlash_WriteStatusReg(struct rt_qspi_device * qspi_device,uint8_t u8Value1,uint8_t u8Value2)54 static rt_err_t SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2)
55 {
56     rt_uint8_t w25x_txCMD1;
57     rt_uint8_t au8Val[2];
58     rt_err_t result;
59     struct rt_qspi_message qspi_message = {0};
60 
61     /* Enable WE */
62     w25x_txCMD1 = W25X_REG_WRITEENABLE;
63     result = rt_qspi_send(qspi_device, &w25x_txCMD1, sizeof(w25x_txCMD1));
64     if (result != sizeof(w25x_txCMD1))
65         goto exit_SpiFlash_WriteStatusReg;
66 
67     /* Prepare status-1, 2 data */
68     au8Val[0] = u8Value1;
69     au8Val[1] = u8Value2;
70 
71     /* 1-bit mode: Instruction+payload */
72     qspi_message.instruction.content = W25X_REG_WRITESTATUS;
73     qspi_message.instruction.qspi_lines = 1;
74 
75     qspi_message.qspi_data_lines   = 1;
76     qspi_message.parent.cs_take    = 1;
77     qspi_message.parent.cs_release = 1;
78     qspi_message.parent.send_buf   = &au8Val[0];
79     qspi_message.parent.length     = sizeof(au8Val);
80     qspi_message.parent.next       = RT_NULL;
81 
82     if (rt_qspi_transfer_message(qspi_device, &qspi_message) != sizeof(au8Val))
83     {
84         result = -RT_ERROR;
85     }
86 
87     result  = RT_EOK;
88 
89 exit_SpiFlash_WriteStatusReg:
90 
91     return result;
92 }
93 
SpiFlash_WaitReady(struct rt_qspi_device * qspi_device)94 static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device)
95 {
96     volatile uint8_t u8ReturnValue;
97 
98     do
99     {
100         u8ReturnValue = SpiFlash_ReadStatusReg(qspi_device);
101         u8ReturnValue = u8ReturnValue & 1;
102     }
103     while (u8ReturnValue != 0);   // check the BUSY bit
104 }
105 
SpiFlash_EnterQspiMode(struct rt_qspi_device * qspi_device)106 static void SpiFlash_EnterQspiMode(struct rt_qspi_device *qspi_device)
107 {
108     rt_err_t result = RT_EOK;
109 
110     uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
111     uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
112 
113     u8Status2 |= W25X_REG_QUADENABLE;
114 
115     result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
116     RT_ASSERT(result == RT_EOK);
117 
118     SpiFlash_WaitReady(qspi_device);
119 }
120 
SpiFlash_ExitQspiMode(struct rt_qspi_device * qspi_device)121 static void SpiFlash_ExitQspiMode(struct rt_qspi_device *qspi_device)
122 {
123     rt_err_t result = RT_EOK;
124     uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
125     uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
126 
127     u8Status2 &= ~W25X_REG_QUADENABLE;
128 
129     result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
130     RT_ASSERT(result == RT_EOK);
131 
132     SpiFlash_WaitReady(qspi_device);
133 }
134 
rt_hw_spiflash_init(void)135 static int rt_hw_spiflash_init(void)
136 {
137     /*
138         Don't forget to switch SPIM pins to QSPI0 pins on board.
139         CS:   R12-Open, R13-Close
140         CLK:  R14-Open, R15-Close
141         MOSI: R16-Open, R17-Close
142         MISO: R18-Open, R19-Close
143         IO2:  R20-Open, R21-Close
144         IO3:  R22-Open, R23-Close
145     */
146     if (nu_qspi_bus_attach_device("qspi0", "qspi01", 4, SpiFlash_EnterQspiMode, SpiFlash_ExitQspiMode) != RT_EOK)
147         return -1;
148 
149 #if defined(RT_USING_SFUD)
150     if (rt_sfud_flash_probe(FAL_USING_NOR_FLASH_DEV_NAME, "qspi01") == RT_NULL)
151     {
152         return -(RT_ERROR);
153     }
154 #endif
155 
156     return 0;
157 }
158 INIT_COMPONENT_EXPORT(rt_hw_spiflash_init);
159 #endif /* BOARD_USING_STORAGE_SPIFLASH */
160 
161 #if defined(BOARD_USING_NCT7717U)
162 
163 #include "sensor_nct7717u.h"
164 
rt_hw_nct7717u_port(void)165 int rt_hw_nct7717u_port(void)
166 {
167     struct rt_sensor_config cfg;
168 
169     cfg.intf.dev_name = "i2c2";
170     cfg.irq_pin.pin = PIN_IRQ_PIN_NONE;
171 
172     return rt_hw_nct7717u_init("nct7717u", &cfg);
173 }
174 INIT_APP_EXPORT(rt_hw_nct7717u_port);
175 #endif /* BOARD_USING_NCT7717U */
176 
177 
178 #if defined(BOARD_USING_MPU6500) && defined(PKG_USING_MPU6XXX)
179 
180 #include "sensor_inven_mpu6xxx.h"
181 
rt_hw_mpu6xxx_port(void)182 int rt_hw_mpu6xxx_port(void)
183 {
184     struct rt_sensor_config cfg;
185     rt_base_t mpu_int = NU_GET_PININDEX(NU_PD, 2);
186 
187     cfg.intf.dev_name = "i2c2";
188     cfg.intf.arg = (void *)MPU6XXX_ADDR_DEFAULT;
189     cfg.irq_pin.pin = mpu_int;
190 
191     return rt_hw_mpu6xxx_init("mpu", &cfg);
192 }
193 INIT_APP_EXPORT(rt_hw_mpu6xxx_port);
194 #endif /* BOARD_USING_MPU6500 */
195 
196 
197 #if defined(BOARD_USING_ESP8266)
198 
rt_hw_esp8266_port(void)199 static int rt_hw_esp8266_port(void)
200 {
201     rt_base_t esp_rst_pin = NU_GET_PININDEX(NU_PC, 4);
202 
203     /* ESP8266 reset pin PC.4 */
204     rt_pin_mode(esp_rst_pin, PIN_MODE_OUTPUT);
205     rt_pin_write(esp_rst_pin, 1);
206 
207     return 0;
208 }
209 INIT_COMPONENT_EXPORT(rt_hw_esp8266_port);
210 
211 #endif /* BOARD_USING_ESP8266  */
212 
213 #if defined(BOARD_USING_LCD_ILI9341) && defined(NU_PKG_USING_ILI9341_SPI)
214 
215 #if defined(NU_PKG_USING_ADC_TOUCH_SW)
216 
217 #include "adc_touch.h"
218 #include "touch_sw.h"
219 #include "NuMicro.h"
220 
221 #define NU_MFP_POS(PIN)          ((PIN % 4) * 8)
222 #define NU_MFP_MSK(PIN)          (0x1ful << NU_MFP_POS(PIN))
223 
224 S_CALIBRATION_MATRIX g_sCalMat = { 97, 6214, -3216652, 4844, -30, -2333200, 65536 };
225 
nu_pin_func(rt_base_t pin,int data)226 static void nu_pin_func(rt_base_t pin, int data)
227 {
228     uint32_t pin_index      = NU_GET_PINS(pin);
229     uint32_t port_index     = NU_GET_PORT(pin);
230     __IO uint32_t *GPx_MFPx = ((__IO uint32_t *) &SYS->GPA_MFP0) + port_index * 4 + (pin_index / 4);
231     uint32_t MFP_Msk        = NU_MFP_MSK(pin_index);
232 
233     *GPx_MFPx  = (*GPx_MFPx & (~MFP_Msk)) | data;
234 }
235 
tp_switch_to_analog(rt_base_t pin)236 static void tp_switch_to_analog(rt_base_t pin)
237 {
238     GPIO_T *port = (GPIO_T *)(GPIOA_BASE + (0x40) * NU_GET_PORT(pin));
239 
240     if (pin == NU_GET_PININDEX(NU_PB, 6))
241         nu_pin_func(pin, SYS_GPB_MFP1_PB6MFP_EADC0_CH6);
242     else if (pin == NU_GET_PININDEX(NU_PB, 9))
243         nu_pin_func(pin, SYS_GPB_MFP2_PB9MFP_EADC0_CH9);
244 
245     GPIO_DISABLE_DIGITAL_PATH(port, NU_GET_PIN_MASK(NU_GET_PINS(pin)));
246 }
247 
tp_switch_to_digital(rt_base_t pin)248 static void tp_switch_to_digital(rt_base_t pin)
249 {
250     GPIO_T *port = (GPIO_T *)(GPIOA_BASE + (0x40) * NU_GET_PORT(pin));
251 
252     nu_pin_func(pin, 0);
253 
254     /* Enable digital path on these EADC pins */
255     GPIO_ENABLE_DIGITAL_PATH(port, NU_GET_PIN_MASK(NU_GET_PINS(pin)));
256 }
257 
258 static S_TOUCH_SW sADCTP =
259 {
260     .adc_name    = "eadc0",
261     .i32ADCChnYU = 6,
262     .i32ADCChnXR = 9,
263     .pin =
264     {
265         NU_GET_PININDEX(NU_PB, 7), // XL
266         NU_GET_PININDEX(NU_PB, 6), // YU
267         NU_GET_PININDEX(NU_PB, 9), // XR
268         NU_GET_PININDEX(NU_PB, 8), // YD
269     },
270     .switch_to_analog  = tp_switch_to_analog,
271     .switch_to_digital = tp_switch_to_digital,
272 };
273 
274 #endif
275 
276 #include <lcd_ili9341.h>
277 #if defined(PKG_USING_GUIENGINE)
278     #include <rtgui/driver.h>
279 #endif
rt_hw_ili9341_port(void)280 int rt_hw_ili9341_port(void)
281 {
282     if (rt_hw_lcd_ili9341_spi_init("spi2", RT_NULL) != RT_EOK)
283         return -1;
284 
285     rt_hw_lcd_ili9341_init();
286 
287 #if defined(PKG_USING_GUIENGINE)
288     rt_device_t lcd_ili9341;
289     lcd_ili9341 = rt_device_find("lcd");
290     if (lcd_ili9341)
291     {
292         rtgui_graphic_set_device(lcd_ili9341);
293     }
294 #endif
295 
296 #if defined(NU_PKG_USING_ADC_TOUCH_SW)
297     nu_adc_touch_sw_register(&sADCTP);
298 #endif
299 
300     return 0;
301 }
302 INIT_COMPONENT_EXPORT(rt_hw_ili9341_port);
303 #endif /* BOARD_USING_LCD_ILI9341 */
304