1 /**************************************************************************//**
2 *
3 * @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 *
7 * Change Logs:
8 * Date Author Notes
9 * 2020-1-16 Wayne First version
10 *
11 ******************************************************************************/
12
13 #include <rtdevice.h>
14 #include <drv_gpio.h>
15
16 #if defined(BOARD_USING_STORAGE_SPIFLASH)
17 #if defined(RT_USING_SFUD)
18 #include "dev_spi_flash.h"
19 #include "dev_spi_flash_sfud.h"
20 #endif
21
22 #include "drv_qspi.h"
23
24 #define W25X_REG_READSTATUS (0x05)
25 #define W25X_REG_READSTATUS2 (0x35)
26 #define W25X_REG_WRITEENABLE (0x06)
27 #define W25X_REG_WRITESTATUS (0x01)
28 #define W25X_REG_QUADENABLE (0x02)
29
SpiFlash_ReadStatusReg(struct rt_qspi_device * qspi_device)30 static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device)
31 {
32 rt_uint8_t u8Val;
33 rt_err_t result = RT_EOK;
34 rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS;
35
36 result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
37 RT_ASSERT(result > 0);
38
39 return u8Val;
40 }
41
SpiFlash_ReadStatusReg2(struct rt_qspi_device * qspi_device)42 static rt_uint8_t SpiFlash_ReadStatusReg2(struct rt_qspi_device *qspi_device)
43 {
44 rt_uint8_t u8Val;
45 rt_err_t result = RT_EOK;
46 rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS2;
47
48 result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
49 RT_ASSERT(result > 0);
50
51 return u8Val;
52 }
53
SpiFlash_WriteStatusReg(struct rt_qspi_device * qspi_device,uint8_t u8Value1,uint8_t u8Value2)54 static rt_err_t SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2)
55 {
56 rt_uint8_t w25x_txCMD1;
57 rt_uint8_t au8Val[2];
58 rt_err_t result;
59 struct rt_qspi_message qspi_message = {0};
60
61 /* Enable WE */
62 w25x_txCMD1 = W25X_REG_WRITEENABLE;
63 result = rt_qspi_send(qspi_device, &w25x_txCMD1, sizeof(w25x_txCMD1));
64 if (result != sizeof(w25x_txCMD1))
65 goto exit_SpiFlash_WriteStatusReg;
66
67 /* Prepare status-1, 2 data */
68 au8Val[0] = u8Value1;
69 au8Val[1] = u8Value2;
70
71 /* 1-bit mode: Instruction+payload */
72 qspi_message.instruction.content = W25X_REG_WRITESTATUS;
73 qspi_message.instruction.qspi_lines = 1;
74
75 qspi_message.qspi_data_lines = 1;
76 qspi_message.parent.cs_take = 1;
77 qspi_message.parent.cs_release = 1;
78 qspi_message.parent.send_buf = &au8Val[0];
79 qspi_message.parent.length = sizeof(au8Val);
80 qspi_message.parent.next = RT_NULL;
81
82 if (rt_qspi_transfer_message(qspi_device, &qspi_message) != sizeof(au8Val))
83 {
84 result = -RT_ERROR;
85 }
86
87 result = RT_EOK;
88
89 exit_SpiFlash_WriteStatusReg:
90
91 return result;
92 }
93
SpiFlash_WaitReady(struct rt_qspi_device * qspi_device)94 static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device)
95 {
96 volatile uint8_t u8ReturnValue;
97
98 do
99 {
100 u8ReturnValue = SpiFlash_ReadStatusReg(qspi_device);
101 u8ReturnValue = u8ReturnValue & 1;
102 }
103 while (u8ReturnValue != 0); // check the BUSY bit
104 }
105
SpiFlash_EnterQspiMode(struct rt_qspi_device * qspi_device)106 static void SpiFlash_EnterQspiMode(struct rt_qspi_device *qspi_device)
107 {
108 rt_err_t result = RT_EOK;
109
110 uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
111 uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
112
113 u8Status2 |= W25X_REG_QUADENABLE;
114
115 result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
116 RT_ASSERT(result == RT_EOK);
117
118 SpiFlash_WaitReady(qspi_device);
119 }
120
SpiFlash_ExitQspiMode(struct rt_qspi_device * qspi_device)121 static void SpiFlash_ExitQspiMode(struct rt_qspi_device *qspi_device)
122 {
123 rt_err_t result = RT_EOK;
124 uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
125 uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
126
127 u8Status2 &= ~W25X_REG_QUADENABLE;
128
129 result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
130 RT_ASSERT(result == RT_EOK);
131
132 SpiFlash_WaitReady(qspi_device);
133 }
134
rt_hw_spiflash_init(void)135 static int rt_hw_spiflash_init(void)
136 {
137 /* Here, we use Dual I/O to drive the SPI flash by default. */
138 /* If you want to use Quad I/O, you can modify to 4 from 2 and crossover D2/D3 pin of SPI flash. */
139 if (nu_qspi_bus_attach_device("qspi0", "qspi01", 2, SpiFlash_EnterQspiMode, SpiFlash_ExitQspiMode) != RT_EOK)
140 return -1;
141
142 #if defined(RT_USING_SFUD)
143 if (rt_sfud_flash_probe("flash0", "qspi01") == RT_NULL)
144 {
145 return -(RT_ERROR);
146 }
147 #endif
148 return 0;
149 }
150 INIT_COMPONENT_EXPORT(rt_hw_spiflash_init);
151 #endif /* BOARD_USING_STORAGE_SPIFLASH */
152
153
154 #if defined(BOARD_USING_MAX31875)
155 #include <sensor_max31875.h>
rt_hw_max31875_port(void)156 int rt_hw_max31875_port(void)
157 {
158 struct rt_sensor_config cfg;
159
160 cfg.intf.dev_name = "i2c1";
161 cfg.intf.arg = (void *)MAX31875_I2C_SLAVE_ADR_R0;
162 cfg.irq_pin.pin = PIN_IRQ_PIN_NONE;
163
164 rt_hw_max31875_init("max31875", &cfg);
165 return 0;
166 }
167 INIT_APP_EXPORT(rt_hw_max31875_port);
168 #endif /* BOARD_USING_MAX31875 */
169
170
171 #if defined(BOARD_USING_BMX055)
172 #include <sensor_bmx055.h>
rt_hw_bmx055_port(void)173 int rt_hw_bmx055_port(void)
174 {
175 struct rt_sensor_config cfg;
176 cfg.intf.dev_name = "i2c2";
177 cfg.intf.arg = (void *)0;
178 cfg.irq_pin.pin = PIN_IRQ_PIN_NONE;
179
180 rt_hw_bmx055_init("bmx055", &cfg);
181 return 0;
182 }
183 INIT_APP_EXPORT(rt_hw_bmx055_port);
184 #endif /* BOARD_USING_BMX055 */
185
186 #if defined(BOARD_USING_ESP8266)
187
rt_hw_esp8266_port(void)188 static int rt_hw_esp8266_port(void)
189 {
190 rt_base_t esp_rst_pin = NU_GET_PININDEX(NU_PH, 3);
191
192 /* ESP8266 reset pin PH.3 */
193 rt_pin_mode(esp_rst_pin, PIN_MODE_OUTPUT);
194 rt_pin_write(esp_rst_pin, 1);
195
196 return 0;
197 }
198 INIT_APP_EXPORT(rt_hw_esp8266_port);
199 #endif /* BOARD_USING_ESP8266 */
200
201 #if defined(BOARD_USING_LCD_ILI9341) && defined(NU_PKG_USING_ILI9341_SPI)
202
203 #if defined(NU_PKG_USING_ADC_TOUCH_SW)
204
205 #include "adc_touch.h"
206 #include "touch_sw.h"
207 #include "NuMicro.h"
208
209 #define NU_MFP_POS(PIN) ((PIN % 8) * 4)
210 #define NU_MFP_MSK(PIN) (0xful << NU_MFP_POS(PIN))
211
212 S_CALIBRATION_MATRIX g_sCalMat = { 97, 6214, -3216652, 4844, -30, -2333200, 65536 };
213
nu_pin_func(rt_base_t pin,int data)214 static void nu_pin_func(rt_base_t pin, int data)
215 {
216 uint32_t pin_index = NU_GET_PINS(pin);
217 uint32_t port_index = NU_GET_PORT(pin);
218 __IO uint32_t *GPx_MFPx = ((__IO uint32_t *) &SYS->GPA_MFPL) + port_index * 2 + (pin_index / 8);
219 uint32_t MFP_Msk = NU_MFP_MSK(pin_index);
220
221 *GPx_MFPx = (*GPx_MFPx & (~MFP_Msk)) | data;
222 }
223
tp_switch_to_analog(rt_base_t pin)224 static void tp_switch_to_analog(rt_base_t pin)
225 {
226 GPIO_T *port = (GPIO_T *)(GPIOA_BASE + (0x40) * NU_GET_PORT(pin));
227
228 if (pin == NU_GET_PININDEX(NU_PB, 6))
229 nu_pin_func(pin, SYS_GPB_MFPL_PB6MFP_EADC0_CH6);
230 else if (pin == NU_GET_PININDEX(NU_PB, 9))
231 nu_pin_func(pin, SYS_GPB_MFPH_PB9MFP_EADC0_CH9);
232
233 GPIO_DISABLE_DIGITAL_PATH(port, NU_GET_PIN_MASK(NU_GET_PINS(pin)));
234 }
235
tp_switch_to_digital(rt_base_t pin)236 static void tp_switch_to_digital(rt_base_t pin)
237 {
238 GPIO_T *port = (GPIO_T *)(GPIOA_BASE + (0x40) * NU_GET_PORT(pin));
239
240 nu_pin_func(pin, 0);
241
242 /* Enable digital path on these EADC pins */
243 GPIO_ENABLE_DIGITAL_PATH(port, NU_GET_PIN_MASK(NU_GET_PINS(pin)));
244 }
245
246 static S_TOUCH_SW sADCTP =
247 {
248 .adc_name = "eadc0",
249 .i32ADCChnYU = 6,
250 .i32ADCChnXR = 9,
251 .pin =
252 {
253 NU_GET_PININDEX(NU_PB, 7), // XL
254 NU_GET_PININDEX(NU_PB, 6), // YU
255 NU_GET_PININDEX(NU_PB, 9), // XR
256 NU_GET_PININDEX(NU_PB, 8), // YD
257 },
258 .switch_to_analog = tp_switch_to_analog,
259 .switch_to_digital = tp_switch_to_digital,
260 };
261
262 #endif
263
264 #include <lcd_ili9341.h>
265 #if defined(PKG_USING_GUIENGINE)
266 #include <rtgui/driver.h>
267 #endif
rt_hw_ili9341_port(void)268 int rt_hw_ili9341_port(void)
269 {
270 if (rt_hw_lcd_ili9341_spi_init("spi2", RT_NULL) != RT_EOK)
271 return -1;
272
273 rt_hw_lcd_ili9341_init();
274
275 #if defined(PKG_USING_GUIENGINE)
276 rt_device_t lcd_ili9341;
277 lcd_ili9341 = rt_device_find("lcd");
278 if (lcd_ili9341)
279 {
280 rtgui_graphic_set_device(lcd_ili9341);
281 }
282 #endif
283
284 #if defined(NU_PKG_USING_ADC_TOUCH_SW)
285 nu_adc_touch_sw_register(&sADCTP);
286 #endif
287
288 return 0;
289 }
290 INIT_COMPONENT_EXPORT(rt_hw_ili9341_port);
291 #endif /* BOARD_USING_LCD_ILI9341 */
292
293 #if defined(BOARD_USING_NAU88L25) && defined(NU_PKG_USING_NAU88L25)
294 #include <acodec_nau88l25.h>
295 S_NU_NAU88L25_CONFIG sCodecConfig =
296 {
297 .i2c_bus_name = "i2c2",
298
299 .i2s_bus_name = "sound0",
300
301 .pin_phonejack_en = NU_GET_PININDEX(NU_PE, 13),
302
303 .pin_phonejack_det = 0,
304 };
305
rt_hw_nau88l25_port(void)306 int rt_hw_nau88l25_port(void)
307 {
308 if (nu_hw_nau88l25_init(&sCodecConfig) != RT_EOK)
309 return -1;
310
311 return 0;
312 }
313 INIT_COMPONENT_EXPORT(rt_hw_nau88l25_port);
314 #endif /* BOARD_USING_NAU88L25 */
315