1 /**************************************************************************//**
2 *
3 * @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 *
7 * Change Logs:
8 * Date Author Notes
9 * 2022-02-22 klcheng First version
10 *
11 ******************************************************************************/
12 #include "NuMicro.h"
13 #include <rtdevice.h>
14 #include <drv_gpio.h>
15
16 #if defined(BOARD_USING_STORAGE_SPIFLASH)
17 #if defined(RT_USING_SFUD)
18 #include "dev_spi_flash.h"
19 #include "dev_spi_flash_sfud.h"
20 #endif
21
22 #include "drv_qspi.h"
23
24 #define W25X_REG_READSTATUS (0x05)
25 #define W25X_REG_READSTATUS2 (0x35)
26 #define W25X_REG_WRITEENABLE (0x06)
27 #define W25X_REG_WRITESTATUS (0x01)
28 #define W25X_REG_QUADENABLE (0x02)
29
SpiFlash_ReadStatusReg(struct rt_qspi_device * qspi_device)30 static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device)
31 {
32 rt_uint8_t u8Val;
33 rt_err_t result = RT_EOK;
34 rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS;
35
36 result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
37 RT_ASSERT(result > 0);
38
39 return u8Val;
40 }
41
SpiFlash_ReadStatusReg2(struct rt_qspi_device * qspi_device)42 static rt_uint8_t SpiFlash_ReadStatusReg2(struct rt_qspi_device *qspi_device)
43 {
44 rt_uint8_t u8Val;
45 rt_err_t result = RT_EOK;
46 rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS2;
47
48 result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
49 RT_ASSERT(result > 0);
50
51 return u8Val;
52 }
53
SpiFlash_WriteStatusReg(struct rt_qspi_device * qspi_device,uint8_t u8Value1,uint8_t u8Value2)54 static rt_err_t SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2)
55 {
56 rt_uint8_t w25x_txCMD1;
57 rt_uint8_t au8Val[2];
58 rt_err_t result;
59 struct rt_qspi_message qspi_message = {0};
60
61 /* Enable WE */
62 w25x_txCMD1 = W25X_REG_WRITEENABLE;
63 result = rt_qspi_send(qspi_device, &w25x_txCMD1, sizeof(w25x_txCMD1));
64 if (result != sizeof(w25x_txCMD1))
65 goto exit_SpiFlash_WriteStatusReg;
66
67 /* Prepare status-1, 2 data */
68 au8Val[0] = u8Value1;
69 au8Val[1] = u8Value2;
70
71 /* 1-bit mode: Instruction+payload */
72 qspi_message.instruction.content = W25X_REG_WRITESTATUS;
73 qspi_message.instruction.qspi_lines = 1;
74
75 qspi_message.qspi_data_lines = 1;
76 qspi_message.parent.cs_take = 1;
77 qspi_message.parent.cs_release = 1;
78 qspi_message.parent.send_buf = &au8Val[0];
79 qspi_message.parent.length = sizeof(au8Val);
80 qspi_message.parent.next = RT_NULL;
81
82 if (rt_qspi_transfer_message(qspi_device, &qspi_message) != sizeof(au8Val))
83 {
84 result = -RT_ERROR;
85 }
86
87 result = RT_EOK;
88
89 exit_SpiFlash_WriteStatusReg:
90
91 return result;
92 }
93
SpiFlash_WaitReady(struct rt_qspi_device * qspi_device)94 static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device)
95 {
96 volatile uint8_t u8ReturnValue;
97
98 do
99 {
100 u8ReturnValue = SpiFlash_ReadStatusReg(qspi_device);
101 u8ReturnValue = u8ReturnValue & 1;
102 }
103 while (u8ReturnValue != 0); // check the BUSY bit
104 }
105
SpiFlash_EnterQspiMode(struct rt_qspi_device * qspi_device)106 static void SpiFlash_EnterQspiMode(struct rt_qspi_device *qspi_device)
107 {
108 rt_err_t result = RT_EOK;
109
110 uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
111 uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
112
113 u8Status2 |= W25X_REG_QUADENABLE;
114
115 result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
116 RT_ASSERT(result == RT_EOK);
117
118 SpiFlash_WaitReady(qspi_device);
119 }
120
SpiFlash_ExitQspiMode(struct rt_qspi_device * qspi_device)121 static void SpiFlash_ExitQspiMode(struct rt_qspi_device *qspi_device)
122 {
123 rt_err_t result = RT_EOK;
124 uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
125 uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
126
127 u8Status2 &= ~W25X_REG_QUADENABLE;
128
129 result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
130 RT_ASSERT(result == RT_EOK);
131
132 SpiFlash_WaitReady(qspi_device);
133 }
134
rt_hw_spiflash_init(void)135 static int rt_hw_spiflash_init(void)
136 {
137 /* Here, we use Dual I/O to drive the SPI flash by default. */
138 /* If you want to use Quad I/O, you can modify to 4 from 2 and crossover D2/D3 pin of SPI flash. */
139 if (nu_qspi_bus_attach_device("qspi0", "qspi01", 2, SpiFlash_EnterQspiMode, SpiFlash_ExitQspiMode) != RT_EOK)
140 return -1;
141
142 #if defined(RT_USING_SFUD)
143 if (rt_sfud_flash_probe("flash0", "qspi01") == RT_NULL)
144 {
145 return -(RT_ERROR);
146 }
147 #endif
148 return 0;
149 }
150 INIT_COMPONENT_EXPORT(rt_hw_spiflash_init);
151 #endif /* BOARD_USING_STORAGE_SPIFLASH */
152
153 #if defined(BOARD_USING_LCD_ILI9341) && defined(NU_PKG_USING_ILI9341_SPI)
154
155 #if defined(NU_PKG_USING_ADC_TOUCH_SW)
156
157 #include "adc_touch.h"
158 #include "touch_sw.h"
159 #include "NuMicro.h"
160
161 #define NU_MFP_POS(PIN) ((PIN % 8) * 4)
162 #define NU_MFP_MSK(PIN) (0xful << NU_MFP_POS(PIN))
163
164 S_CALIBRATION_MATRIX g_sCalMat = { 25, 6607, -3535848, 5185, 33, -2924330, 65536 };
165
nu_pin_func(rt_base_t pin,int data)166 static void nu_pin_func(rt_base_t pin, int data)
167 {
168 uint32_t pin_index = NU_GET_PINS(pin);
169 uint32_t port_index = NU_GET_PORT(pin);
170 __IO uint32_t *GPx_MFPx = ((__IO uint32_t *) &SYS->GPA_MFPL) + port_index * 2 + (pin_index / 8);
171 uint32_t MFP_Msk = NU_MFP_MSK(pin_index);
172
173 *GPx_MFPx = (*GPx_MFPx & (~MFP_Msk)) | data;
174 }
175
tp_switch_to_analog(rt_base_t pin)176 static void tp_switch_to_analog(rt_base_t pin)
177 {
178 GPIO_T *port = (GPIO_T *)(PA_BASE + (0x40) * NU_GET_PORT(pin));
179
180 if (pin == NU_GET_PININDEX(NU_PB, 7))
181 nu_pin_func(pin, SYS_GPB_MFPL_PB7MFP_ADC0_CH7);
182 else if (pin == NU_GET_PININDEX(NU_PB, 4))
183 nu_pin_func(pin, SYS_GPB_MFPL_PB4MFP_ADC0_CH4);
184
185 GPIO_DISABLE_DIGITAL_PATH(port, NU_GET_PIN_MASK(NU_GET_PINS(pin)));
186 }
187
tp_switch_to_digital(rt_base_t pin)188 static void tp_switch_to_digital(rt_base_t pin)
189 {
190 GPIO_T *port = (GPIO_T *)(PA_BASE + (0x40) * NU_GET_PORT(pin));
191
192 nu_pin_func(pin, 0);
193
194 /* Enable digital path on these EADC pins */
195 GPIO_ENABLE_DIGITAL_PATH(port, NU_GET_PIN_MASK(NU_GET_PINS(pin)));
196 }
197
198 static S_TOUCH_SW sADCTP =
199 {
200 .adc_name = "adc0",
201 .i32ADCChnYU = 7,
202 .i32ADCChnXR = 4,
203 .pin =
204 {
205 NU_GET_PININDEX(NU_PB, 6), // XL
206 NU_GET_PININDEX(NU_PB, 7), // YU
207 NU_GET_PININDEX(NU_PB, 4), // XR
208 NU_GET_PININDEX(NU_PB, 5), // YD
209 },
210 .switch_to_analog = tp_switch_to_analog,
211 .switch_to_digital = tp_switch_to_digital,
212 };
213
214 #endif
215
216 #include <lcd_ili9341.h>
217 #if defined(PKG_USING_GUIENGINE)
218 #include <rtgui/driver.h>
219 #endif
220
221 static rt_base_t g_ILI9341_SPI_CS_PIN = NU_GET_PININDEX(NU_PA, 8);
rt_hw_ili9341_port(void)222 int rt_hw_ili9341_port(void)
223 {
224 if (rt_hw_lcd_ili9341_spi_init("uspi0", (void *)&g_ILI9341_SPI_CS_PIN) != RT_EOK)
225 return -1;
226
227 rt_hw_lcd_ili9341_init();
228
229 #if defined(PKG_USING_GUIENGINE)
230 rt_device_t lcd_ili9341;
231 lcd_ili9341 = rt_device_find("lcd");
232 if (lcd_ili9341)
233 {
234 rtgui_graphic_set_device(lcd_ili9341);
235 }
236 #endif
237
238 #if defined(NU_PKG_USING_ADC_TOUCH_SW)
239 nu_adc_touch_sw_register(&sADCTP);
240 #endif
241
242 return 0;
243 }
244 INIT_COMPONENT_EXPORT(rt_hw_ili9341_port);
245 #endif /* BOARD_USING_LCD_ILI9341 */
246