1 /***************************************************************************** 2 * @brief provide system init routine/configuration for NV32Fxx. 3 * 4 *******************************************************************************/ 5 6 #include "common.h" 7 #include "sysinit.h" 8 #include "sim.h" 9 #include "uart.h" 10 #include "ics.h" 11 12 /********************************************************************/ 13 14 uint16_t global_pass_count = 0; 15 uint16_t global_fail_count = 0; 16 17 18 void print_sys_log(void); 19 void UART_InitPrint(void); 20 21 /*****************************************************************************//*! 22 +FUNCTION---------------------------------------------------------------- 23 * @function name: sysinit 24 * 25 * @brief initalize system including SIM, ICS, UART, etc 26 * 27 * @param none 28 * 29 * @return none 30 * 31 * @ Pass/ Fail criteria: none 32 *****************************************************************************/ sysinit(void)33void sysinit (void) 34 { 35 SIM_ConfigType sSIMConfig = {{0}, 0}; 36 ICS_ConfigType sICSConfig = {0}; 37 38 /* initialize the Pass/Fail counts to 0 */ 39 global_pass_count = 0; 40 global_fail_count = 0; 41 42 EFMCR &= 0xFFFF0001; // set wait state 1 43 44 #if defined(TRIM_IRC) 45 /* if not trimmed, do trim first */ 46 ICS_Trim(ICS_TRIM_VALUE); 47 #endif 48 /* 49 * Enable SWD pin, RESET pin 50 */ 51 /* 52 * NOTE: please make sure other register bits are also write-once and 53 * need add other bit mask here if needed. 54 */ 55 #if defined(SPI0_PINREMAP) 56 sSIMConfig.u32PinSel |= SIM_PINSEL_SPI0PS_MASK; 57 #endif 58 59 #if defined(OUTPUT_BUSCLK) 60 sSIMConfig.sBits.bEnableCLKOUT = 1; /* output bus clock if enabled */ 61 #endif 62 63 #if defined(DISABLE_NMI) 64 sSIMConfig.sBits.bDisableNMI = 1; 65 #endif 66 67 #if !defined(CPU_NV32M3) 68 /* make sure clocks to peripheral modules are enabled */ 69 sSIMConfig.u32SCGC |= SIM_SCGC_SWD_MASK | SIM_SCGC_FLASH_MASK | 70 SIM_SCGC_UART0_MASK | SIM_SCGC_UART1_MASK | 71 SIM_SCGC_UART2_MASK 72 ; 73 #else 74 sSIMConfig.u32SCGC |= SIM_SCGC_SWD_MASK | SIM_SCGC_FLASH_MASK | 75 SIM_SCGC_UART0_MASK 76 ; 77 #endif 78 79 #if !defined(CPU_NV32) 80 /* bus clock divided by 2 */ 81 // sSIMConfig.u32BusDiv |= SIM_CLKDIV_OUTDIV2_MASK; 82 #endif 83 84 // sSIMConfig.sBits.bBusDiv |= SIM_BUSDIV_BUSDIV_MASK; 85 86 SIM_Init(&sSIMConfig); /* initialize SIM */ 87 88 #if defined(XOSC_STOP_ENABLE) 89 sICSConfig.oscConfig.bStopEnable = 1; /* enabled in stop mode */ 90 #endif 91 92 #if defined(CRYST_HIGH_GAIN) 93 sICSConfig.oscConfig.bGain = 1; /* high gain */ 94 #endif 95 96 97 #if (EXT_CLK_FREQ_KHZ >=4000) 98 sICSConfig.oscConfig.bRange = 1; /* high range */ 99 #endif 100 101 sICSConfig.oscConfig.bEnable = 1; /* enable OSC */ 102 sICSConfig.u32ClkFreq = EXT_CLK_FREQ_KHZ; 103 104 #if defined(USE_FEE) 105 sICSConfig.u8ClkMode = ICS_CLK_MODE_FEE; 106 #elif defined(USE_FBE_OSC) 107 sICSConfig.u8ClkMode = ICS_CLK_MODE_FBE_OSC; 108 #elif defined(USE_FEE_OSC) 109 sICSConfig.u8ClkMode = ICS_CLK_MODE_FEE_OSC; 110 #elif defined(USE_FBILP) 111 sICSConfig.u8ClkMode = ICS_CLK_MODE_FBILP; 112 #elif defined(USE_FBELP) 113 sICSConfig.u8ClkMode = ICS_CLK_MODE_FBELP; 114 #endif 115 116 ICS_Init(&sICSConfig); /* initialize ICS */ 117 118 119 } 120 NMI_Handler(void)121void NMI_Handler(void) 122 { 123 while(1); 124 } 125