1 /*
2  * Copyright (c) 2012, Freescale Semiconductor, Inc.
3  * All rights reserved.
4  *
5  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
6  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
7  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
8  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
9  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
10  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
11  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
12  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
13  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
14  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
15  */
16 
17 // File: ecspi1_iomux_config.c
18 
19 /* ------------------------------------------------------------------------------
20  * <auto-generated>
21  *     This code was generated by a tool.
22  *     Runtime Version:3.4.0.0
23  *
24  *     Changes to this file may cause incorrect behavior and will be lost if
25  *     the code is regenerated.
26  * </auto-generated>
27  * ------------------------------------------------------------------------------
28 */
29 
30 #include "iomux_config.h"
31 #include "registers/regsiomuxc.h"
32 
33 // Function to configure IOMUXC for ecspi1 module.
ecspi1_iomux_config(void)34 void ecspi1_iomux_config(void)
35 {
36     // Config ecspi1.ECSPI1_MISO to pad EIM_DATA17(F21)
37     // HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA17_WR(0x00000001);
38     // HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_WR(0x0001B0B0);
39     // HW_IOMUXC_ECSPI1_MISO_SELECT_INPUT_WR(0x00000002);
40     // Mux Register:
41     // IOMUXC_SW_MUX_CTL_PAD_EIM_DATA17(0x020E0148)
42     //   SION [4] - Software Input On Field Reset: DISABLED
43     //              Force the selected mux mode Input path no matter of MUX_MODE functionality.
44     //     DISABLED (0) - Input Path is determined by functionality of the selected mux mode (regular).
45     //     ENABLED (1) - Force input path of pad.
46     //   MUX_MODE [3:0] - MUX Mode Select Field Reset: ALT5
47     //                    Select iomux modes to be used for pad.
48     //     ALT0 (0) - Select instance: eim signal: EIM_DATA17
49     //     ALT1 (1) - Select instance: ecspi1 signal: ECSPI1_MISO
50     //     ALT2 (2) - Select instance: ipu1 signal: IPU1_DI0_PIN06
51     //     ALT3 (3) - Select instance: ipu1 signal: IPU1_CSI1_PIXCLK
52     //     ALT4 (4) - Select instance: dcic1 signal: DCIC1_OUT
53     //     ALT5 (5) - Select instance: gpio3 signal: GPIO3_IO17
54     //     ALT6 (6) - Select instance: i2c3 signal: I2C3_SCL
55     //     ALT8 (8) - Select instance: epdc signal: EPDC_VCOM0
56     HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA17_WR(
57             BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA17_SION_V(DISABLED) |
58             BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA17_MUX_MODE_V(ALT1));
59     // Pad Control Register:
60     // IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17(0x020E0518)
61     //   HYS [16] - Hysteresis Enable Field Reset: ENABLED
62     //     DISABLED (0) - CMOS input
63     //     ENABLED (1) - Schmitt trigger input
64     //   PUS [15:14] - Pull Up / Down Config. Field Reset: 100K_OHM_PU
65     //     100K_OHM_PD (0) - 100K Ohm Pull Down
66     //     47K_OHM_PU (1) - 47K Ohm Pull Up
67     //     100K_OHM_PU (2) - 100K Ohm Pull Up
68     //     22K_OHM_PU (3) - 22K Ohm Pull Up
69     //   PUE [13] - Pull / Keep Select Field Reset: PULL
70     //     KEEP (0) - Keeper Enabled
71     //     PULL (1) - Pull Enabled
72     //   PKE [12] - Pull / Keep Enable Field Reset: ENABLED
73     //     DISABLED (0) - Pull/Keeper Disabled
74     //     ENABLED (1) - Pull/Keeper Enabled
75     //   ODE [11] - Open Drain Enable Field Reset: DISABLED
76     //              Enables open drain of the pin.
77     //     DISABLED (0) - Output is CMOS.
78     //     ENABLED (1) - Output is Open Drain.
79     //   SPEED [7:6] - Speed Field Reset: 100MHZ
80     //     RESERVED0 (0) - Reserved
81     //     50MHZ (1) - Low (50 MHz)
82     //     100MHZ (2) - Medium (100 MHz)
83     //     200MHZ (3) - Maximum (200 MHz)
84     //   DSE [5:3] - Drive Strength Field Reset: 40_OHM
85     //     HIZ (0) - HI-Z
86     //     240_OHM (1) - 240 Ohm
87     //     120_OHM (2) - 120 Ohm
88     //     80_OHM (3) - 80 Ohm
89     //     60_OHM (4) - 60 Ohm
90     //     48_OHM (5) - 48 Ohm
91     //     40_OHM (6) - 40 Ohm
92     //     34_OHM (7) - 34 Ohm
93     //   SRE [0] - Slew Rate Field Reset: SLOW
94     //             Slew rate control.
95     //     SLOW (0) - Slow Slew Rate
96     //     FAST (1) - Fast Slew Rate
97     HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_WR(
98             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_HYS_V(ENABLED) |
99             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_PUS_V(100K_OHM_PU) |
100             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_PUE_V(PULL) |
101             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_PKE_V(ENABLED) |
102             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_ODE_V(DISABLED) |
103             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_SPEED_V(100MHZ) |
104             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_DSE_V(40_OHM) |
105             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_SRE_V(SLOW));
106     // Pad EIM_DATA17 is involved in Daisy Chain.
107     // Input Select Register:
108     // IOMUXC_ECSPI1_MISO_SELECT_INPUT(0x020E07DC)
109     //   DAISY [1:0] - MUX Mode Select Field Reset: CSI0_DATA06_ALT2
110     //                 Selecting Pads Involved in Daisy Chain.
111     //     CSI0_DATA06_ALT2 (0) - Select signal ecspi1 ECSPI1_MISO as input from pad CSI0_DATA06(ALT2).
112     //     DISP0_DATA22_ALT2 (1) - Select signal ecspi1 ECSPI1_MISO as input from pad DISP0_DATA22(ALT2).
113     //     EIM_DATA17_ALT1 (2) - Select signal ecspi1 ECSPI1_MISO as input from pad EIM_DATA17(ALT1).
114     //     KEY_COL1_ALT0 (3) - Select signal ecspi1 ECSPI1_MISO as input from pad KEY_COL1(ALT0).
115     HW_IOMUXC_ECSPI1_MISO_SELECT_INPUT_WR(
116             BF_IOMUXC_ECSPI1_MISO_SELECT_INPUT_DAISY_V(EIM_DATA17_ALT1));
117 
118     // Config ecspi1.ECSPI1_MOSI to pad EIM_DATA18(D24)
119     // HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18_WR(0x00000001);
120     // HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_WR(0x0001B0B0);
121     // HW_IOMUXC_ECSPI1_MOSI_SELECT_INPUT_WR(0x00000002);
122     // Mux Register:
123     // IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18(0x020E014C)
124     //   SION [4] - Software Input On Field Reset: DISABLED
125     //              Force the selected mux mode Input path no matter of MUX_MODE functionality.
126     //     DISABLED (0) - Input Path is determined by functionality of the selected mux mode (regular).
127     //     ENABLED (1) - Force input path of pad.
128     //   MUX_MODE [3:0] - MUX Mode Select Field Reset: ALT5
129     //                    Select iomux modes to be used for pad.
130     //     ALT0 (0) - Select instance: eim signal: EIM_DATA18
131     //     ALT1 (1) - Select instance: ecspi1 signal: ECSPI1_MOSI
132     //     ALT2 (2) - Select instance: ipu1 signal: IPU1_DI0_PIN07
133     //     ALT3 (3) - Select instance: ipu1 signal: IPU1_CSI1_DATA17
134     //     ALT4 (4) - Select instance: ipu1 signal: IPU1_DI1_D0_CS
135     //     ALT5 (5) - Select instance: gpio3 signal: GPIO3_IO18
136     //     ALT6 (6) - Select instance: i2c3 signal: I2C3_SDA
137     //     ALT8 (8) - Select instance: epdc signal: EPDC_VCOM1
138     HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18_WR(
139             BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18_SION_V(DISABLED) |
140             BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18_MUX_MODE_V(ALT1));
141     // Pad Control Register:
142     // IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18(0x020E051C)
143     //   HYS [16] - Hysteresis Enable Field Reset: ENABLED
144     //     DISABLED (0) - CMOS input
145     //     ENABLED (1) - Schmitt trigger input
146     //   PUS [15:14] - Pull Up / Down Config. Field Reset: 100K_OHM_PU
147     //     100K_OHM_PD (0) - 100K Ohm Pull Down
148     //     47K_OHM_PU (1) - 47K Ohm Pull Up
149     //     100K_OHM_PU (2) - 100K Ohm Pull Up
150     //     22K_OHM_PU (3) - 22K Ohm Pull Up
151     //   PUE [13] - Pull / Keep Select Field Reset: PULL
152     //     KEEP (0) - Keeper Enabled
153     //     PULL (1) - Pull Enabled
154     //   PKE [12] - Pull / Keep Enable Field Reset: ENABLED
155     //     DISABLED (0) - Pull/Keeper Disabled
156     //     ENABLED (1) - Pull/Keeper Enabled
157     //   ODE [11] - Open Drain Enable Field Reset: DISABLED
158     //              Enables open drain of the pin.
159     //     DISABLED (0) - Output is CMOS.
160     //     ENABLED (1) - Output is Open Drain.
161     //   SPEED [7:6] - Speed Field Reset: 100MHZ
162     //     RESERVED0 (0) - Reserved
163     //     50MHZ (1) - Low (50 MHz)
164     //     100MHZ (2) - Medium (100 MHz)
165     //     200MHZ (3) - Maximum (200 MHz)
166     //   DSE [5:3] - Drive Strength Field Reset: 40_OHM
167     //     HIZ (0) - HI-Z
168     //     240_OHM (1) - 240 Ohm
169     //     120_OHM (2) - 120 Ohm
170     //     80_OHM (3) - 80 Ohm
171     //     60_OHM (4) - 60 Ohm
172     //     48_OHM (5) - 48 Ohm
173     //     40_OHM (6) - 40 Ohm
174     //     34_OHM (7) - 34 Ohm
175     //   SRE [0] - Slew Rate Field Reset: SLOW
176     //             Slew rate control.
177     //     SLOW (0) - Slow Slew Rate
178     //     FAST (1) - Fast Slew Rate
179     HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_WR(
180             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_HYS_V(ENABLED) |
181             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_PUS_V(100K_OHM_PU) |
182             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_PUE_V(PULL) |
183             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_PKE_V(ENABLED) |
184             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_ODE_V(DISABLED) |
185             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_SPEED_V(100MHZ) |
186             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_DSE_V(40_OHM) |
187             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_SRE_V(SLOW));
188     // Pad EIM_DATA18 is involved in Daisy Chain.
189     // Input Select Register:
190     // IOMUXC_ECSPI1_MOSI_SELECT_INPUT(0x020E07E0)
191     //   DAISY [1:0] - MUX Mode Select Field Reset: CSI0_DATA05_ALT2
192     //                 Selecting Pads Involved in Daisy Chain.
193     //     CSI0_DATA05_ALT2 (0) - Select signal ecspi1 ECSPI1_MOSI as input from pad CSI0_DATA05(ALT2).
194     //     DISP0_DATA21_ALT2 (1) - Select signal ecspi1 ECSPI1_MOSI as input from pad DISP0_DATA21(ALT2).
195     //     EIM_DATA18_ALT1 (2) - Select signal ecspi1 ECSPI1_MOSI as input from pad EIM_DATA18(ALT1).
196     //     KEY_ROW0_ALT0 (3) - Select signal ecspi1 ECSPI1_MOSI as input from pad KEY_ROW0(ALT0).
197     HW_IOMUXC_ECSPI1_MOSI_SELECT_INPUT_WR(
198             BF_IOMUXC_ECSPI1_MOSI_SELECT_INPUT_DAISY_V(EIM_DATA18_ALT1));
199 
200     // Config ecspi1.ECSPI1_RDY to pad GPIO19(P5)
201     // HW_IOMUXC_SW_MUX_CTL_PAD_GPIO19_WR(0x00000004);
202     // HW_IOMUXC_SW_PAD_CTL_PAD_GPIO19_WR(0x0001B0B0);
203     // Mux Register:
204     // IOMUXC_SW_MUX_CTL_PAD_GPIO19(0x020E0220)
205     //   SION [4] - Software Input On Field Reset: DISABLED
206     //              Force the selected mux mode Input path no matter of MUX_MODE functionality.
207     //     DISABLED (0) - Input Path is determined by functionality of the selected mux mode (regular).
208     //     ENABLED (1) - Force input path of pad.
209     //   MUX_MODE [2:0] - MUX Mode Select Field Reset: ALT5
210     //                    Select iomux modes to be used for pad.
211     //     ALT0 (0) - Select instance: kpp signal: KEY_COL5
212     //     ALT1 (1) - Select instance: enet signal: ENET_1588_EVENT0_OUT
213     //     ALT2 (2) - Select instance: spdif signal: SPDIF_OUT
214     //     ALT3 (3) - Select instance: ccm signal: CCM_CLKO1
215     //     ALT4 (4) - Select instance: ecspi1 signal: ECSPI1_RDY
216     //     ALT5 (5) - Select instance: gpio4 signal: GPIO4_IO05
217     //     ALT6 (6) - Select instance: enet signal: ENET_TX_ER
218     HW_IOMUXC_SW_MUX_CTL_PAD_GPIO19_WR(
219             BF_IOMUXC_SW_MUX_CTL_PAD_GPIO19_SION_V(DISABLED) |
220             BF_IOMUXC_SW_MUX_CTL_PAD_GPIO19_MUX_MODE_V(ALT4));
221     // Pad Control Register:
222     // IOMUXC_SW_PAD_CTL_PAD_GPIO19(0x020E05F0)
223     //   HYS [16] - Hysteresis Enable Field Reset: ENABLED
224     //     DISABLED (0) - CMOS input
225     //     ENABLED (1) - Schmitt trigger input
226     //   PUS [15:14] - Pull Up / Down Config. Field Reset: 100K_OHM_PU
227     //     100K_OHM_PD (0) - 100K Ohm Pull Down
228     //     47K_OHM_PU (1) - 47K Ohm Pull Up
229     //     100K_OHM_PU (2) - 100K Ohm Pull Up
230     //     22K_OHM_PU (3) - 22K Ohm Pull Up
231     //   PUE [13] - Pull / Keep Select Field Reset: PULL
232     //     KEEP (0) - Keeper Enabled
233     //     PULL (1) - Pull Enabled
234     //   PKE [12] - Pull / Keep Enable Field Reset: ENABLED
235     //     DISABLED (0) - Pull/Keeper Disabled
236     //     ENABLED (1) - Pull/Keeper Enabled
237     //   ODE [11] - Open Drain Enable Field Reset: DISABLED
238     //              Enables open drain of the pin.
239     //     DISABLED (0) - Output is CMOS.
240     //     ENABLED (1) - Output is Open Drain.
241     //   SPEED [7:6] - Speed Field Reset: 100MHZ
242     //     RESERVED0 (0) - Reserved
243     //     50MHZ (1) - Low (50 MHz)
244     //     100MHZ (2) - Medium (100 MHz)
245     //     200MHZ (3) - Maximum (200 MHz)
246     //   DSE [5:3] - Drive Strength Field Reset: 40_OHM
247     //     HIZ (0) - HI-Z
248     //     240_OHM (1) - 240 Ohm
249     //     120_OHM (2) - 120 Ohm
250     //     80_OHM (3) - 80 Ohm
251     //     60_OHM (4) - 60 Ohm
252     //     48_OHM (5) - 48 Ohm
253     //     40_OHM (6) - 40 Ohm
254     //     34_OHM (7) - 34 Ohm
255     //   SRE [0] - Slew Rate Field Reset: SLOW
256     //             Slew rate control.
257     //     SLOW (0) - Slow Slew Rate
258     //     FAST (1) - Fast Slew Rate
259     HW_IOMUXC_SW_PAD_CTL_PAD_GPIO19_WR(
260             BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_HYS_V(ENABLED) |
261             BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_PUS_V(100K_OHM_PU) |
262             BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_PUE_V(PULL) |
263             BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_PKE_V(ENABLED) |
264             BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_ODE_V(DISABLED) |
265             BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_SPEED_V(100MHZ) |
266             BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_DSE_V(40_OHM) |
267             BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_SRE_V(SLOW));
268 
269     // Config ecspi1.ECSPI1_SCLK to pad EIM_DATA16(C25)
270     // HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA16_WR(0x00000001);
271     // HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_WR(0x0001B0B0);
272     // HW_IOMUXC_ECSPI1_CSPI_CLK_IN_SELECT_INPUT_WR(0x00000002);
273     // Mux Register:
274     // IOMUXC_SW_MUX_CTL_PAD_EIM_DATA16(0x020E0144)
275     //   SION [4] - Software Input On Field Reset: DISABLED
276     //              Force the selected mux mode Input path no matter of MUX_MODE functionality.
277     //     DISABLED (0) - Input Path is determined by functionality of the selected mux mode (regular).
278     //     ENABLED (1) - Force input path of pad.
279     //   MUX_MODE [3:0] - MUX Mode Select Field Reset: ALT5
280     //                    Select iomux modes to be used for pad.
281     //     ALT0 (0) - Select instance: eim signal: EIM_DATA16
282     //     ALT1 (1) - Select instance: ecspi1 signal: ECSPI1_SCLK
283     //     ALT2 (2) - Select instance: ipu1 signal: IPU1_DI0_PIN05
284     //     ALT3 (3) - Select instance: ipu1 signal: IPU1_CSI1_DATA18
285     //     ALT4 (4) - Select instance: hdmi signal: HDMI_TX_DDC_SDA
286     //     ALT5 (5) - Select instance: gpio3 signal: GPIO3_IO16
287     //     ALT6 (6) - Select instance: i2c2 signal: I2C2_SDA
288     //     ALT8 (8) - Select instance: epdc signal: EPDC_DATA10
289     HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA16_WR(
290             BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA16_SION_V(DISABLED) |
291             BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA16_MUX_MODE_V(ALT1));
292     // Pad Control Register:
293     // IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16(0x020E0514)
294     //   HYS [16] - Hysteresis Enable Field Reset: ENABLED
295     //     DISABLED (0) - CMOS input
296     //     ENABLED (1) - Schmitt trigger input
297     //   PUS [15:14] - Pull Up / Down Config. Field Reset: 100K_OHM_PU
298     //     100K_OHM_PD (0) - 100K Ohm Pull Down
299     //     47K_OHM_PU (1) - 47K Ohm Pull Up
300     //     100K_OHM_PU (2) - 100K Ohm Pull Up
301     //     22K_OHM_PU (3) - 22K Ohm Pull Up
302     //   PUE [13] - Pull / Keep Select Field Reset: PULL
303     //     KEEP (0) - Keeper Enabled
304     //     PULL (1) - Pull Enabled
305     //   PKE [12] - Pull / Keep Enable Field Reset: ENABLED
306     //     DISABLED (0) - Pull/Keeper Disabled
307     //     ENABLED (1) - Pull/Keeper Enabled
308     //   ODE [11] - Open Drain Enable Field Reset: DISABLED
309     //              Enables open drain of the pin.
310     //     DISABLED (0) - Output is CMOS.
311     //     ENABLED (1) - Output is Open Drain.
312     //   SPEED [7:6] - Speed Field Reset: 100MHZ
313     //     RESERVED0 (0) - Reserved
314     //     50MHZ (1) - Low (50 MHz)
315     //     100MHZ (2) - Medium (100 MHz)
316     //     200MHZ (3) - Maximum (200 MHz)
317     //   DSE [5:3] - Drive Strength Field Reset: 40_OHM
318     //     HIZ (0) - HI-Z
319     //     240_OHM (1) - 240 Ohm
320     //     120_OHM (2) - 120 Ohm
321     //     80_OHM (3) - 80 Ohm
322     //     60_OHM (4) - 60 Ohm
323     //     48_OHM (5) - 48 Ohm
324     //     40_OHM (6) - 40 Ohm
325     //     34_OHM (7) - 34 Ohm
326     //   SRE [0] - Slew Rate Field Reset: SLOW
327     //             Slew rate control.
328     //     SLOW (0) - Slow Slew Rate
329     //     FAST (1) - Fast Slew Rate
330     HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_WR(
331             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_HYS_V(ENABLED) |
332             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_PUS_V(100K_OHM_PU) |
333             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_PUE_V(PULL) |
334             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_PKE_V(ENABLED) |
335             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_ODE_V(DISABLED) |
336             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_SPEED_V(100MHZ) |
337             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_DSE_V(40_OHM) |
338             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_SRE_V(SLOW));
339     // Pad EIM_DATA16 is involved in Daisy Chain.
340     // Input Select Register:
341     // IOMUXC_ECSPI1_CSPI_CLK_IN_SELECT_INPUT(0x020E07D8)
342     //   DAISY [1:0] - MUX Mode Select Field Reset: CSI0_DATA04_ALT2
343     //                 Selecting Pads Involved in Daisy Chain.
344     //     CSI0_DATA04_ALT2 (0) - Select signal ecspi1 ECSPI1_SCLK as input from pad CSI0_DATA04(ALT2).
345     //     DISP0_DATA20_ALT2 (1) - Select signal ecspi1 ECSPI1_SCLK as input from pad DISP0_DATA20(ALT2).
346     //     EIM_DATA16_ALT1 (2) - Select signal ecspi1 ECSPI1_SCLK as input from pad EIM_DATA16(ALT1).
347     //     KEY_COL0_ALT0 (3) - Select signal ecspi1 ECSPI1_SCLK as input from pad KEY_COL0(ALT0).
348     HW_IOMUXC_ECSPI1_CSPI_CLK_IN_SELECT_INPUT_WR(
349             BF_IOMUXC_ECSPI1_CSPI_CLK_IN_SELECT_INPUT_DAISY_V(EIM_DATA16_ALT1));
350 
351     // Config ecspi1.ECSPI1_SS1 to pad EIM_DATA19(G21)
352     // HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA19_WR(0x00000001);
353     // HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_WR(0x0001B0B0);
354     // HW_IOMUXC_ECSPI1_SS1_SELECT_INPUT_WR(0x00000001);
355     // Mux Register:
356     // IOMUXC_SW_MUX_CTL_PAD_EIM_DATA19(0x020E0150)
357     //   SION [4] - Software Input On Field Reset: DISABLED
358     //              Force the selected mux mode Input path no matter of MUX_MODE functionality.
359     //     DISABLED (0) - Input Path is determined by functionality of the selected mux mode (regular).
360     //     ENABLED (1) - Force input path of pad.
361     //   MUX_MODE [3:0] - MUX Mode Select Field Reset: ALT5
362     //                    Select iomux modes to be used for pad.
363     //     ALT0 (0) - Select instance: eim signal: EIM_DATA19
364     //     ALT1 (1) - Select instance: ecspi1 signal: ECSPI1_SS1
365     //     ALT2 (2) - Select instance: ipu1 signal: IPU1_DI0_PIN08
366     //     ALT3 (3) - Select instance: ipu1 signal: IPU1_CSI1_DATA16
367     //     ALT4 (4) - Select instance: uart1 signal: UART1_CTS_B
368     //     ALT5 (5) - Select instance: gpio3 signal: GPIO3_IO19
369     //     ALT6 (6) - Select instance: epit1 signal: EPIT1_OUT
370     //     ALT8 (8) - Select instance: epdc signal: EPDC_DATA12
371     HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA19_WR(
372             BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA19_SION_V(DISABLED) |
373             BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA19_MUX_MODE_V(ALT1));
374     // Pad Control Register:
375     // IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19(0x020E0520)
376     //   HYS [16] - Hysteresis Enable Field Reset: ENABLED
377     //     DISABLED (0) - CMOS input
378     //     ENABLED (1) - Schmitt trigger input
379     //   PUS [15:14] - Pull Up / Down Config. Field Reset: 100K_OHM_PU
380     //     100K_OHM_PD (0) - 100K Ohm Pull Down
381     //     47K_OHM_PU (1) - 47K Ohm Pull Up
382     //     100K_OHM_PU (2) - 100K Ohm Pull Up
383     //     22K_OHM_PU (3) - 22K Ohm Pull Up
384     //   PUE [13] - Pull / Keep Select Field Reset: PULL
385     //     KEEP (0) - Keeper Enabled
386     //     PULL (1) - Pull Enabled
387     //   PKE [12] - Pull / Keep Enable Field Reset: ENABLED
388     //     DISABLED (0) - Pull/Keeper Disabled
389     //     ENABLED (1) - Pull/Keeper Enabled
390     //   ODE [11] - Open Drain Enable Field Reset: DISABLED
391     //              Enables open drain of the pin.
392     //     DISABLED (0) - Output is CMOS.
393     //     ENABLED (1) - Output is Open Drain.
394     //   SPEED [7:6] - Speed Field Reset: 100MHZ
395     //     RESERVED0 (0) - Reserved
396     //     50MHZ (1) - Low (50 MHz)
397     //     100MHZ (2) - Medium (100 MHz)
398     //     200MHZ (3) - Maximum (200 MHz)
399     //   DSE [5:3] - Drive Strength Field Reset: 40_OHM
400     //     HIZ (0) - HI-Z
401     //     240_OHM (1) - 240 Ohm
402     //     120_OHM (2) - 120 Ohm
403     //     80_OHM (3) - 80 Ohm
404     //     60_OHM (4) - 60 Ohm
405     //     48_OHM (5) - 48 Ohm
406     //     40_OHM (6) - 40 Ohm
407     //     34_OHM (7) - 34 Ohm
408     //   SRE [0] - Slew Rate Field Reset: SLOW
409     //             Slew rate control.
410     //     SLOW (0) - Slow Slew Rate
411     //     FAST (1) - Fast Slew Rate
412     HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_WR(
413             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_HYS_V(ENABLED) |
414             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_PUS_V(100K_OHM_PU) |
415             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_PUE_V(PULL) |
416             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_PKE_V(ENABLED) |
417             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_ODE_V(DISABLED) |
418             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_SPEED_V(100MHZ) |
419             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_DSE_V(40_OHM) |
420             BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_SRE_V(SLOW));
421     // Pad EIM_DATA19 is involved in Daisy Chain.
422     // Input Select Register:
423     // IOMUXC_ECSPI1_SS1_SELECT_INPUT(0x020E07E8)
424     //   DAISY [1:0] - MUX Mode Select Field Reset: DISP0_DATA15_ALT2
425     //                 Selecting Pads Involved in Daisy Chain.
426     //     DISP0_DATA15_ALT2 (0) - Select signal ecspi1 ECSPI1_SS1 as input from pad DISP0_DATA15(ALT2).
427     //     EIM_DATA19_ALT1 (1) - Select signal ecspi1 ECSPI1_SS1 as input from pad EIM_DATA19(ALT1).
428     //     KEY_COL2_ALT0 (2) - Select signal ecspi1 ECSPI1_SS1 as input from pad KEY_COL2(ALT0).
429     HW_IOMUXC_ECSPI1_SS1_SELECT_INPUT_WR(
430             BF_IOMUXC_ECSPI1_SS1_SELECT_INPUT_DAISY_V(EIM_DATA19_ALT1));
431 }
432