1 /*
2  * Copyright 2018-2019 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 /***********************************************************************************************************************
9  * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10  * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11  **********************************************************************************************************************/
12 
13 /*
14  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
15 !!GlobalInfo
16 product: Pins v5.0
17 processor: MIMXRT1021xxxxx
18 package_id: MIMXRT1021DAG5A
19 mcu_data: ksdk2_0
20 processor_version: 5.0.1
21 board: MIMXRT1020-EVK
22 power_domains: {NVCC_GPIO: '3.3'}
23  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
24  */
25 
26 #include "fsl_common.h"
27 #include "fsl_iomuxc.h"
28 #include "pin_mux.h"
29 
30 /* FUNCTION ************************************************************************************************************
31  *
32  * Function Name : BOARD_InitBootPins
33  * Description   : Calls initialization functions.
34  *
35  * END ****************************************************************************************************************/
BOARD_InitBootPins(void)36 void BOARD_InitBootPins(void) {
37     BOARD_InitPins();
38 }
39 
40 /*
41  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
42 BOARD_InitPins:
43 - options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
44 - pin_list:
45   - {pin_num: '101', peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_07, software_input_on: Disable, open_drain: Disable}
46   - {pin_num: '105', peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_06, software_input_on: Disable, open_drain: Disable}
47  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
48  */
49 
50 /* FUNCTION ************************************************************************************************************
51  *
52  * Function Name : BOARD_InitPins
53  * Description   : Configures pin routing and optionally pin electrical features.
54  *
55  * END ****************************************************************************************************************/
BOARD_InitPins(void)56 void BOARD_InitPins(void) {
57   CLOCK_EnableClock(kCLOCK_Iomuxc);           /* iomuxc clock (iomuxc_clk_enable): 0x03U */
58 
59    IOMUXC_SetPinMux(
60       IOMUXC_GPIO_AD_B0_05_GPIO1_IO05,        /* GPIO_AD_B0_05 is configured as GPIO1_IO05 */
61       0U);                                    /* Software Input On Field: Input Path is determined by functionality */
62   IOMUXC_SetPinConfig(
63       IOMUXC_GPIO_AD_B0_05_GPIO1_IO05,        /* GPIO_AD_B0_05 PAD functional properties : */
64       0x10B0U);                               /* Slew Rate Field: Slow Slew Rate
65                                                  Drive Strength Field: R0/6
66                                                  Speed Field: medium(100MHz)
67                                                  Open Drain Enable Field: Open Drain Disabled
68                                                  Pull / Keep Enable Field: Pull/Keeper Enabled
69                                                  Pull / Keep Select Field: Keeper
70                                                  Pull Up / Down Config. Field: 100K Ohm Pull Down
71                                                  Hyst. Enable Field: Hysteresis Disabled */
72 
73   IOMUXC_SetPinMux(
74       IOMUXC_GPIO_AD_B0_06_LPUART1_TX,        /* GPIO_AD_B0_06 is configured as LPUART1_TX */
75       0U);                                    /* Software Input On Field: Input Path is determined by functionality */
76   IOMUXC_SetPinMux(
77       IOMUXC_GPIO_AD_B0_07_LPUART1_RX,        /* GPIO_AD_B0_07 is configured as LPUART1_RX */
78       0U);                                    /* Software Input On Field: Input Path is determined by functionality */
79   IOMUXC_SetPinConfig(
80       IOMUXC_GPIO_AD_B0_06_LPUART1_TX,        /* GPIO_AD_B0_06 PAD functional properties : */
81       0x10B0U);                               /* Slew Rate Field: Slow Slew Rate
82                                                  Drive Strength Field: R0/6
83                                                  Speed Field: medium(100MHz)
84                                                  Open Drain Enable Field: Open Drain Disabled
85                                                  Pull / Keep Enable Field: Pull/Keeper Enabled
86                                                  Pull / Keep Select Field: Keeper
87                                                  Pull Up / Down Config. Field: 100K Ohm Pull Down
88                                                  Hyst. Enable Field: Hysteresis Disabled */
89   IOMUXC_SetPinConfig(
90       IOMUXC_GPIO_AD_B0_07_LPUART1_RX,        /* GPIO_AD_B0_07 PAD functional properties : */
91       0x10B0U);                               /* Slew Rate Field: Slow Slew Rate
92                                                  Drive Strength Field: R0/6
93                                                  Speed Field: medium(100MHz)
94                                                  Open Drain Enable Field: Open Drain Disabled
95                                                  Pull / Keep Enable Field: Pull/Keeper Enabled
96                                                  Pull / Keep Select Field: Keeper
97                                                  Pull Up / Down Config. Field: 100K Ohm Pull Down
98                                                  Hyst. Enable Field: Hysteresis Disabled */
99 }
100 
101 /***********************************************************************************************************************
102  * EOF
103  **********************************************************************************************************************/
104