1 /***********************************************************************************************************************
2 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
3 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
4 **********************************************************************************************************************/
5
6 /*
7 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
8 !!GlobalInfo
9 product: Pins v5.0
10 processor: MIMXRT1052xxxxB
11 package_id: MIMXRT1052DVL6B
12 mcu_data: ksdk2_0
13 processor_version: 5.0.2
14 board: IMXRT1050-EVKB
15 pin_labels:
16 - {pin_num: G11, pin_signal: GPIO_AD_B0_03, label: BSP_BEEP}
17 - {pin_num: L13, pin_signal: GPIO_AD_B1_10, label: BSP_RS485_RE, identifier: CSI_D7}
18 - {pin_num: J13, pin_signal: GPIO_AD_B1_11, label: BSP_DS18B20, identifier: CSI_D6}
19 - {pin_num: K12, pin_signal: GPIO_AD_B1_05, label: BSP_AP3216C_INT, identifier: CSI_MCLK}
20 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
21 */
22
23 #include "fsl_common.h"
24 #include "fsl_iomuxc.h"
25 #include "pin_mux.h"
26
27 /* FUNCTION ************************************************************************************************************
28 *
29 * Function Name : BOARD_InitBootPins
30 * Description : Calls initialization functions.
31 *
32 * END ****************************************************************************************************************/
BOARD_InitBootPins(void)33 void BOARD_InitBootPins(void) {
34 }
35
36 /*
37 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
38 BOARD_InitPins:
39 - options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
40 - pin_list:
41 - {pin_num: K14, peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_12}
42 - {pin_num: L14, peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_13}
43 - {pin_num: L11, peripheral: LPUART2, signal: TX, pin_signal: GPIO_AD_B1_02}
44 - {pin_num: M12, peripheral: LPUART2, signal: RX, pin_signal: GPIO_AD_B1_03}
45 - {pin_num: D13, peripheral: LPUART5, signal: TX, pin_signal: GPIO_B1_12}
46 - {pin_num: D14, peripheral: LPUART5, signal: RX, pin_signal: GPIO_B1_13}
47 - {pin_num: H13, peripheral: PWM4, signal: 'A, 0', pin_signal: GPIO_AD_B1_08}
48 - {pin_num: M13, peripheral: PWM4, signal: 'A, 1', pin_signal: GPIO_AD_B1_09}
49 - {pin_num: G13, peripheral: PWM1, signal: 'A, 3', pin_signal: GPIO_AD_B0_10}
50 - {pin_num: J11, peripheral: LPI2C1, signal: SCL, pin_signal: GPIO_AD_B1_00, software_input_on: Enable}
51 - {pin_num: K11, peripheral: LPI2C1, signal: SDA, pin_signal: GPIO_AD_B1_01, software_input_on: Enable}
52 - {pin_num: L13, peripheral: GPIO1, signal: 'gpio_io, 26', pin_signal: GPIO_AD_B1_10}
53 - {pin_num: G11, peripheral: GPIO1, signal: 'gpio_io, 03', pin_signal: GPIO_AD_B0_03}
54 - {pin_num: J13, peripheral: GPIO1, signal: 'gpio_io, 27', pin_signal: GPIO_AD_B1_11}
55 - {pin_num: K12, peripheral: GPIO1, signal: 'gpio_io, 21', pin_signal: GPIO_AD_B1_05}
56 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
57 */
58
59 /* FUNCTION ************************************************************************************************************
60 *
61 * Function Name : BOARD_InitPins
62 * Description : Configures pin routing and optionally pin electrical features.
63 *
64 * END ****************************************************************************************************************/
BOARD_InitPins(void)65 void BOARD_InitPins(void) {
66 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
67
68 IOMUXC_SetPinMux(
69 IOMUXC_GPIO_AD_B0_03_GPIO1_IO03, /* GPIO_AD_B0_03 is configured as GPIO1_IO03 */
70 0U); /* Software Input On Field: Input Path is determined by functionality */
71 IOMUXC_SetPinMux(
72 IOMUXC_GPIO_AD_B0_10_FLEXPWM1_PWMA03, /* GPIO_AD_B0_10 is configured as FLEXPWM1_PWMA03 */
73 0U); /* Software Input On Field: Input Path is determined by functionality */
74 IOMUXC_SetPinMux(
75 IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */
76 0U); /* Software Input On Field: Input Path is determined by functionality */
77 IOMUXC_SetPinMux(
78 IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */
79 0U); /* Software Input On Field: Input Path is determined by functionality */
80 IOMUXC_SetPinMux(
81 IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, /* GPIO_AD_B1_00 is configured as LPI2C1_SCL */
82 1U); /* Software Input On Field: Force input path of pad GPIO_AD_B1_00 */
83 IOMUXC_SetPinMux(
84 IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, /* GPIO_AD_B1_01 is configured as LPI2C1_SDA */
85 1U); /* Software Input On Field: Force input path of pad GPIO_AD_B1_01 */
86 IOMUXC_SetPinMux(
87 IOMUXC_GPIO_AD_B1_02_LPUART2_TX, /* GPIO_AD_B1_02 is configured as LPUART2_TX */
88 0U); /* Software Input On Field: Input Path is determined by functionality */
89 IOMUXC_SetPinMux(
90 IOMUXC_GPIO_AD_B1_03_LPUART2_RX, /* GPIO_AD_B1_03 is configured as LPUART2_RX */
91 0U); /* Software Input On Field: Input Path is determined by functionality */
92 IOMUXC_SetPinMux(
93 IOMUXC_GPIO_AD_B1_05_GPIO1_IO21, /* GPIO_AD_B1_05 is configured as GPIO1_IO21 */
94 0U); /* Software Input On Field: Input Path is determined by functionality */
95 IOMUXC_SetPinMux(
96 IOMUXC_GPIO_AD_B1_08_FLEXPWM4_PWMA00, /* GPIO_AD_B1_08 is configured as FLEXPWM4_PWMA00 */
97 0U); /* Software Input On Field: Input Path is determined by functionality */
98 IOMUXC_SetPinMux(
99 IOMUXC_GPIO_AD_B1_09_FLEXPWM4_PWMA01, /* GPIO_AD_B1_09 is configured as FLEXPWM4_PWMA01 */
100 0U); /* Software Input On Field: Input Path is determined by functionality */
101 IOMUXC_SetPinMux(
102 IOMUXC_GPIO_AD_B1_10_GPIO1_IO26, /* GPIO_AD_B1_10 is configured as GPIO1_IO26 */
103 0U); /* Software Input On Field: Input Path is determined by functionality */
104 IOMUXC_SetPinMux(
105 IOMUXC_GPIO_AD_B1_11_GPIO1_IO27, /* GPIO_AD_B1_11 is configured as GPIO1_IO27 */
106 0U); /* Software Input On Field: Input Path is determined by functionality */
107 IOMUXC_SetPinMux(
108 IOMUXC_GPIO_B1_12_LPUART5_TX, /* GPIO_B1_12 is configured as LPUART5_TX */
109 0U); /* Software Input On Field: Input Path is determined by functionality */
110 IOMUXC_SetPinMux(
111 IOMUXC_GPIO_B1_13_LPUART5_RX, /* GPIO_B1_13 is configured as LPUART5_RX */
112 0U); /* Software Input On Field: Input Path is determined by functionality */
113 IOMUXC_SetPinMux(
114 IOMUXC_GPIO_AD_B0_14_FLEXCAN2_TX, /* GPIO_AD_B0_14 is configured as FLEXCAN2_TX */
115 1U); /* Software Input On Field: Force input path of pad GPIO_AD_B0_14 */
116 IOMUXC_SetPinMux(
117 IOMUXC_GPIO_AD_B0_15_FLEXCAN2_RX, /* GPIO_AD_B0_15 is configured as FLEXCAN2_RX */
118 1U); /* Software Input On Field: Force input path of pad GPIO_AD_B0_15 */
119 IOMUXC_SetPinConfig(
120 IOMUXC_GPIO_AD_B0_14_FLEXCAN2_TX, /* GPIO_AD_B0_14 PAD functional properties : */
121 0x10B0u); /* Slew Rate Field: Slow Slew Rate
122 Drive Strength Field: R0/6
123 Speed Field: medium(100MHz)
124 Open Drain Enable Field: Open Drain Disabled
125 Pull / Keep Enable Field: Pull/Keeper Enabled
126 Pull / Keep Select Field: Keeper
127 Pull Up / Down Config. Field: 100K Ohm Pull Down
128 Hyst. Enable Field: Hysteresis Disabled */
129 IOMUXC_SetPinConfig(
130 IOMUXC_GPIO_AD_B0_15_FLEXCAN2_RX, /* GPIO_AD_B0_15 PAD functional properties : */
131 0x10B0u); /* Slew Rate Field: Slow Slew Rate
132 Drive Strength Field: R0/6
133 Speed Field: medium(100MHz)
134 Open Drain Enable Field: Open Drain Disabled
135 Pull / Keep Enable Field: Pull/Keeper Enabled
136 Pull / Keep Select Field: Keeper
137 Pull Up / Down Config. Field: 100K Ohm Pull Down
138 Hyst. Enable Field: Hysteresis Disabled */
139 }
140
141 /***********************************************************************************************************************
142 * EOF
143 **********************************************************************************************************************/
144