1 /* 2 * Copyright (c) 2015, Freescale Semiconductor, Inc. 3 * Copyright 2016 - 2017 NXP 4 * 5 * Redistribution and use in source and binary forms, with or without modification, 6 * are permitted provided that the following conditions are met: 7 * 8 * o Redistributions of source code must retain the above copyright notice, this list 9 * of conditions and the following disclaimer. 10 * 11 * o Redistributions in binary form must reproduce the above copyright notice, this 12 * list of conditions and the following disclaimer in the documentation and/or 13 * other materials provided with the distribution. 14 * 15 * o Neither the name of the copyright holder nor the names of its 16 * contributors may be used to endorse or promote products derived from this 17 * software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 #ifndef __USB_PHY_H__ 31 #define __USB_PHY_H__ 32 33 /******************************************************************************* 34 * Definitions 35 ******************************************************************************/ 36 typedef struct _usb_phy_config_struct 37 { 38 uint8_t D_CAL; /* Decode to trim the nominal 17.78mA current source */ 39 uint8_t TXCAL45DP; /* Decode to trim the nominal 45-Ohm series termination resistance to the USB_DP output pin */ 40 uint8_t TXCAL45DM; /* Decode to trim the nominal 45-Ohm series termination resistance to the USB_DM output pin */ 41 } usb_phy_config_struct_t; 42 43 #if defined(__cplusplus) 44 extern "C" { 45 #endif 46 47 /******************************************************************************* 48 * API 49 ******************************************************************************/ 50 /*! 51 * @brief EHCI PHY get USB phy bass address. 52 * 53 * This function is used to get USB phy bass address. 54 * 55 * @param[in] controllerId EHCI controller ID; See the #usb_controller_index_t. 56 * 57 * @retval USB phy bass address. 58 */ 59 extern void *USB_EhciPhyGetBase(uint8_t controllerId); 60 61 /*! 62 * @brief EHCI PHY initialization. 63 * 64 * This function initializes the EHCI PHY IP. 65 * 66 * @param[in] controllerId EHCI controller ID; See the #usb_controller_index_t. 67 * @param[in] freq The external input clock. 68 * 69 * @retval kStatus_USB_Success Cancel successfully. 70 * @retval kStatus_USB_Error The freq value is incorrect. 71 */ 72 extern uint32_t USB_EhciPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_config_struct_t *phyConfig); 73 74 /*! 75 * @brief ehci phy initialization for suspend and resume. 76 * 77 * This function initialize ehci phy IP for suspend and resume. 78 * 79 * @param[in] controllerId ehci controller id, please reference to #usb_controller_index_t. 80 * @param[in] freq the external input clock. 81 * for example: if the external input clock is 16M, the parameter freq should be 16000000. 82 * 83 * @retval kStatus_USB_Success cancel successfully. 84 * @retval kStatus_USB_Error the freq value is incorrect. 85 */ 86 extern uint32_t USB_EhciLowPowerPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_config_struct_t *phyConfig); 87 88 /*! 89 * @brief EHCI PHY deinitialization. 90 * 91 * This function deinitializes the EHCI PHY IP. 92 * 93 * @param[in] controllerId EHCI controller ID; See #usb_controller_index_t. 94 */ 95 extern void USB_EhciPhyDeinit(uint8_t controllerId); 96 97 /*! 98 * @brief EHCI PHY disconnect detection enable or disable. 99 * 100 * This function enable/disable the host EHCI disconnect detection. 101 * 102 * @param[in] controllerId EHCI controller ID; See #usb_controller_index_t. 103 * @param[in] enable 104 * 1U - enable; 105 * 0U - disable; 106 */ 107 extern void USB_EhcihostPhyDisconnectDetectCmd(uint8_t controllerId, uint8_t enable); 108 #if ((defined FSL_FEATURE_SOC_USBPHY_COUNT) && (FSL_FEATURE_SOC_USBPHY_COUNT > 0U)) 109 #if ((defined FSL_FEATURE_USBHSD_HAS_EXIT_HS_ISSUE) && (FSL_FEATURE_USBHSD_HAS_EXIT_HS_ISSUE > 0U)) 110 /*! 111 * @brief Force the PHY enter FS Mode 112 * 113 * on RT500 and RT600, the device doesn't enter FS Mode after vbus is invalide and the controller works as HS. 114 * 115 * @param[in] controllerId EHCI controller ID; See #usb_controller_index_t. 116 * @param[in] enable 117 * 1U - enable; 118 * 0U - disable; 119 */ 120 extern void USB_PhyDeviceForceEnterFSMode(uint8_t controllerId, uint8_t enable); 121 #endif 122 #endif 123 #if defined(__cplusplus) 124 } 125 #endif 126 127 #endif /* __USB_PHY_H__ */ 128