1 /**************************************************************************** 2 * 3 * The MIT License (MIT) 4 * 5 * Copyright (c) 2014 - 2020 Vivante Corporation 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the "Software"), 9 * to deal in the Software without restriction, including without limitation 10 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * and/or sell copies of the Software, and to permit persons to whom the 12 * Software is furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 20 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 *****************************************************************************/ 26 27 #ifndef _vg_lite_hw_h 28 #define _vg_lite_hw_h 29 30 #define VG_LITE_HW_CLOCK_CONTROL 0x000 31 #define VG_LITE_HW_IDLE 0x004 32 #define VG_LITE_INTR_STATUS 0x010 33 #define VG_LITE_INTR_ENABLE 0x014 34 #define VG_LITE_HW_CHIP_ID 0x020 35 #define VG_LITE_HW_CMDBUF_ADDRESS 0x500 36 #define VG_LITE_HW_CMDBUF_SIZE 0x504 37 #define VG_LITE_HW_POWER_CONTROL 0x100 38 #define VG_LITE_HW_POWER_MODULE_CONTROL 0x104 39 40 #define VG_LITE_EXT_WORK_CONTROL 0x520 41 #define VG_LITE_EXT_VIDEO_SIZE 0x524 42 #define VG_LITE_EXT_CLEAR_VALUE 0x528 43 44 #define VG_LITE_EXT_VIDEO_CONTROL 0x51C 45 46 typedef struct clock_control { 47 uint32_t reserved0 : 1; 48 uint32_t clock_gate : 1; 49 uint32_t scale : 7; 50 uint32_t scale_load : 1; 51 uint32_t reserved10 : 2; 52 uint32_t soft_reset : 1; 53 uint32_t reserved13 : 6; 54 uint32_t isolate : 1; 55 } clock_control_t; 56 57 typedef union vg_lite_hw_clock_control { 58 clock_control_t control; 59 uint32_t data; 60 } vg_lite_hw_clock_control_t; 61 62 #define VG_LITE_HW_IDLE_STATE 0x0B05 63 64 #endif /* defined(_vg_lite_hw_h) */ 65