1/*
2 * Copyright (c) 2019, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date           Author       Notes
8 * 2019-05-05     jg1uaa       the first version
9 */
10
11#include "../rtconfig.h"
12
13/* Interrupt Vectors */
14        .section .isr_vector
15        .thumb
16        .align 0
17
18        .long   _estack                 // MSP default value
19        .long   Reset_Handler + 1       //  1: Reset
20        .long   default_handler + 1     //  2: NMI
21        .long   HardFault_Handler + 1   //  3: HardFault
22        .long   default_handler + 1     //  4: reserved
23        .long   default_handler + 1     //  5: reserved
24        .long   default_handler + 1     //  6: reserved
25        .long   default_handler + 1     //  7: reserved
26        .long   default_handler + 1     //  8: reserved
27        .long   default_handler + 1     //  9: reserved
28        .long   default_handler + 1     // 10: reserved
29        .long   default_handler + 1     // 11: SVCall
30        .long   default_handler + 1     // 12: reserved
31        .long   default_handler + 1     // 13: reserved
32        .long   PendSV_Handler + 1      // 14: PendSV
33        .long   SysTick_Handler + 1     // 15: SysTick
34        .long   default_handler + 1     // 16: External Interrupt(0)
35        .long   default_handler + 1     // 17: External Interrupt(1)
36        .long   default_handler + 1     // 18: External Interrupt(2)
37        .long   default_handler + 1     // 19: External Interrupt(3)
38        .long   default_handler + 1     // 20: External Interrupt(4)
39        .long   default_handler + 1     // 21: External Interrupt(5)
40        .long   default_handler + 1     // 22: External Interrupt(6)
41        .long   default_handler + 1     // 23: External Interrupt(7)
42        .long   default_handler + 1     // 24: External Interrupt(8)
43        .long   default_handler + 1     // 25: External Interrupt(9)
44        .long   default_handler + 1     // 26: External Interrupt(10)
45        .long   default_handler + 1     // 27: External Interrupt(11)
46        .long   default_handler + 1     // 28: External Interrupt(12)
47        .long   default_handler + 1     // 29: External Interrupt(13) C_CAN
48        .long   default_handler + 1     // 30: External Interrupt(14) SPI/SSP1
49        .long   default_handler + 1     // 31: External Interrupt(15) I2C
50        .long   default_handler + 1     // 32: External Interrupt(16) CT16B0
51        .long   default_handler + 1     // 33: External Interrupt(17) CT16B1
52        .long   default_handler + 1     // 34: External Interrupt(18) CT32B0
53        .long   default_handler + 1     // 35: External Interrupt(19) CT32B1
54        .long   default_handler + 1     // 36: External Interrupt(20) SPI/SSP0
55        .long   UART_IRQHandler + 1     // 37: External Interrupt(21) UART
56        .long   default_handler + 1     // 38: External Interrupt(22)
57        .long   default_handler + 1     // 39: External Interrupt(23)
58        .long   default_handler + 1     // 40: External Interrupt(24) ADC
59        .long   default_handler + 1     // 41: External Interrupt(25) WDT
60        .long   default_handler + 1     // 42: External Interrupt(26) BOD
61        .long   default_handler + 1     // 43: External Interrupt(27)
62        .long   default_handler + 1     // 44: External Interrupt(28) PIO_3
63        .long   default_handler + 1     // 45: External Interrupt(29) PIO_2
64        .long   default_handler + 1     // 46: External Interrupt(30) PIO_1
65        .long   default_handler + 1     // 47: External Interrupt(31) PIO_0
66        .long   default_handler + 1     // 48: External Interrupt(32)
67        .long   default_handler + 1     // 49: External Interrupt(33)
68        .long   default_handler + 1     // 50: External Interrupt(34)
69        .long   default_handler + 1     // 51: External Interrupt(35)
70        .long   default_handler + 1     // 52: External Interrupt(36)
71        .long   default_handler + 1     // 53: External Interrupt(37)
72        .long   default_handler + 1     // 54: External Interrupt(38)
73        .long   default_handler + 1     // 55: External Interrupt(39)
74        .long   default_handler + 1     // 56: External Interrupt(40)
75        .long   default_handler + 1     // 57: External Interrupt(41)
76        .long   default_handler + 1     // 58: External Interrupt(42)
77        .long   default_handler + 1     // 59: External Interrupt(43)
78        .long   default_handler + 1     // 60: External Interrupt(44)
79        .long   default_handler + 1     // 61: External Interrupt(45)
80        .long   default_handler + 1     // 62: External Interrupt(46)
81        .long   default_handler + 1     // 63: External Interrupt(47)
82
83/* startup */
84        .section .text
85        .thumb
86        .align 0
87        .global Reset_Handler
88Reset_Handler:
89
90        /* initialize .data */
91data_init:
92        ldr     r1, =_sidata
93        ldr     r2, =_sdata
94        ldr     r3, =_edata
95        cmp     r2, r3
96        beq     bss_init
97data_loop:
98        ldrb    r0, [r1]
99        add     r1, r1, #1
100        strb    r0, [r2]
101        add     r2, r2, #1
102        cmp     r2, r3
103        bne     data_loop
104
105        /* initialize .bss */
106bss_init:
107        mov     r0, #0
108        ldr     r2, =_sbss      // sbss/ebss is 4byte aligned by link.lds
109        ldr     r3, =_ebss
110        cmp     r2, r3
111        beq     start_main
112bss_loop:
113        str     r0, [r2]
114        add     r2, r2, #4
115        cmp     r2, r3
116        bne     bss_loop
117
118        /* launch main() */
119start_main:
120#ifdef RT_USING_USER_MAIN
121        bl      entry
122#else
123        bl      main
124#endif
125
126default_handler:
127die:
128        b       die
129
130        .pool
131
132    .end