1 /*
2  * The Clear BSD License
3  * Copyright (c) 2015, Freescale Semiconductor, Inc.
4  * Copyright 2016-2017 NXP
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without modification,
8  * are permitted (subject to the limitations in the disclaimer below) provided
9  * that the following conditions are met:
10  *
11  * o Redistributions of source code must retain the above copyright notice, this list
12  *   of conditions and the following disclaimer.
13  *
14  * o Redistributions in binary form must reproduce the above copyright notice, this
15  *   list of conditions and the following disclaimer in the documentation and/or
16  *   other materials provided with the distribution.
17  *
18  * o Neither the name of the copyright holder nor the names of its
19  *   contributors may be used to endorse or promote products derived from this
20  *   software without specific prior written permission.
21  *
22  * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
23  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
30  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 /*
36  * How to set up clock using clock driver functions:
37  *
38  * 1. Setup clock sources.
39  *
40  * 2. Setup voltage for the fastest of the clock outputs
41  *
42  * 3. Set up wait states of the flash.
43  *
44  * 4. Set up all dividers.
45  *
46  * 5. Set up all selectors to provide selected clocks.
47  */
48 
49 /* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
50 !!ClocksProfile
51 product: Clocks v1.0
52 processor: LPC54114J256
53 package_id: LPC54114J256BD64
54 mcu_data: ksdk2_0
55 processor_version: 1.1.0
56 board: LPCXpresso54114
57  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
58 
59 #include "fsl_power.h"
60 #include "fsl_clock.h"
61 #include "clock_config.h"
62 
63 /*******************************************************************************
64  * Definitions
65  ******************************************************************************/
66 
67 /*******************************************************************************
68  * Variables
69  ******************************************************************************/
70 /* System clock frequency. */
71 extern uint32_t SystemCoreClock;
72 
73 /*******************************************************************************
74  ********************* Configuration BOARD_BootClockFRO12M ***********************
75  ******************************************************************************/
76 /* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
77 !!Configuration
78 name: BOARD_BootClockFRO12M
79 outputs:
80 - {id: System_clock.outFreq, value: 12 MHz}
81  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
82 
83 /*******************************************************************************
84  * Variables for BOARD_BootClockFRO12M configuration
85  ******************************************************************************/
86 /*******************************************************************************
87  * Code for BOARD_BootClockFRO12M configuration
88  ******************************************************************************/
BOARD_BootClockFRO12M(void)89 void BOARD_BootClockFRO12M(void)
90 {
91     /*!< Set up the clock sources */
92     /*!< Set up FRO */
93     POWER_DisablePD(kPDRUNCFG_PD_FRO_EN);                   /*!< Ensure FRO is on  */
94     CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                  /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
95                                                                 being below the voltage for current speed */
96     CLOCK_SetupFROClocking(12000000U);                    /*!< Set up FRO to the 12 MHz, just for sure */
97     POWER_SetVoltageForFreq(12000000U);             /*!< Set voltage for the one of the fastest clock outputs: System clock output */
98     CLOCK_SetFLASHAccessCyclesForFreq(12000000U);   /*!< Set FLASH wait states for core */
99 
100     /*!< Set up dividers */
101     CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);                  /*!< Set AHBCLKDIV divider to value 1 */
102 
103     /*!< Set up clock selectors - Attach clocks to the peripheries */
104     CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                  /*!< Switch MAIN_CLK to FRO12M */
105     /*!< Set SystemCoreClock variable. */
106     SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
107 }
108 
109 /*******************************************************************************
110  ********************** Configuration BOARD_BootClockFROHF48M ***********************
111  ******************************************************************************/
112 /* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
113 !!Configuration
114 name: BOARD_BootClockFROHF48M
115 outputs:
116 - {id: System_clock.outFreq, value: 48 MHz}
117 settings:
118 - {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
119  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
120 
121 /*******************************************************************************
122  * Variables for BOARD_BootClockFROHF48M configuration
123  ******************************************************************************/
124 /*******************************************************************************
125  * Code for BOARD_BootClockFROHF48M configuration
126  ******************************************************************************/
BOARD_BootClockFROHF48M(void)127 void BOARD_BootClockFROHF48M(void)
128 {
129     /*!< Set up the clock sources */
130     /*!< Set up FRO */
131     POWER_DisablePD(kPDRUNCFG_PD_FRO_EN);                   /*!< Ensure FRO is on  */
132     CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                  /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
133                                                                 being below the voltage for current speed */
134     POWER_SetVoltageForFreq(48000000U);             /*!< Set voltage for the one of the fastest clock outputs: System clock output */
135     CLOCK_SetFLASHAccessCyclesForFreq(48000000U);   /*!< Set FLASH wait states for core */
136 
137     CLOCK_SetupFROClocking(48000000U);              /*!< Set up high frequency FRO output to selected frequency */
138 
139     /*!< Set up dividers */
140     CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);                  /*!< Set AHBCLKDIV divider to value 1 */
141 
142     /*!< Set up clock selectors - Attach clocks to the peripheries */
143     CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);                  /*!< Switch MAIN_CLK to FRO_HF */
144     /*!< Set SystemCoreClock variable. */
145     SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK;
146 }
147 
148 /*******************************************************************************
149  ********************* Configuration BOARD_BootClockFROHF96M **********************
150  ******************************************************************************/
151 /* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
152 !!Configuration
153 name: BOARD_BootClockFROHF96M
154 outputs:
155 - {id: System_clock.outFreq, value: 96 MHz}
156 settings:
157 - {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
158 sources:
159 - {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
160  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
161 
162 /*******************************************************************************
163  * Variables for BOARD_BootClockFROHF96M configuration
164  ******************************************************************************/
165 /*******************************************************************************
166  * Code for BOARD_BootClockFROHF96M configuration
167  ******************************************************************************/
BOARD_BootClockFROHF96M(void)168 void BOARD_BootClockFROHF96M(void)
169 {
170     /*!< Set up the clock sources */
171     /*!< Set up FRO */
172     POWER_DisablePD(kPDRUNCFG_PD_FRO_EN);                   /*!< Ensure FRO is on  */
173     CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                  /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
174                                                                 being below the voltage for current speed */
175     POWER_SetVoltageForFreq(96000000U);             /*!< Set voltage for the one of the fastest clock outputs: System clock output */
176     CLOCK_SetFLASHAccessCyclesForFreq(96000000U);   /*!< Set FLASH wait states for core */
177 
178     CLOCK_SetupFROClocking(96000000U);              /*!< Set up high frequency FRO output to selected frequency */
179 
180     /*!< Set up dividers */
181     CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);                  /*!< Set AHBCLKDIV divider to value 1 */
182 
183     /*!< Set up clock selectors - Attach clocks to the peripheries */
184     CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);                  /*!< Switch MAIN_CLK to FRO_HF */
185     /*!< Set SystemCoreClock variable. */
186     SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
187 }
188 
189