1#! armcc -E 2/* 3** ################################################################### 4** Processors: LPC54114J256BD64_cm4 5** LPC54114J256UK49_cm4 6** 7** Compiler: Keil ARM C/C++ Compiler 8** Reference manual: LPC5411x User manual Rev. 1.0 16 February 2016 9** Version: rev. 1.0, 2016-04-29 10** Build: b160526 11** 12** Abstract: 13** Linker file for the Keil ARM C/C++ Compiler 14** 15** The Clear BSD License 16** Copyright 2016 Freescale Semiconductor, Inc. 17** Copyright 2016-2017 NXP 18** All rights reserved. 19** 20** Redistribution and use in source and binary forms, with or without modification, 21** are permitted (subject to the limitations in the disclaimer below) provided 22** that the following conditions are met: 23** 24** 1. Redistributions of source code must retain the above copyright notice, this list 25** of conditions and the following disclaimer. 26** 27** 2. Redistributions in binary form must reproduce the above copyright notice, this 28** list of conditions and the following disclaimer in the documentation and/or 29** other materials provided with the distribution. 30** 31** 3. Neither the name of the copyright holder nor the names of its 32** contributors may be used to endorse or promote products derived from this 33** software without specific prior written permission. 34** 35** NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. 36** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 37** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 38** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 39** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 40** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 41** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 42** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 43** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 44** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 45** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 46** 47** http: www.nxp.com 48** mail: support@nxp.com 49** 50** ################################################################### 51*/ 52 53#define m_interrupts_start 0x00000000 54#define m_interrupts_size 0x000000E0 55 56#define m_text_start 0x000000E0 57#define m_text_size 0x0002FF20 58 59#define m_core1_image_start 0x00030000 60#define m_core1_image_size 0x00010000 61 62#if (defined(__use_shmem__)) 63#define m_rpmsg_sh_mem_start 0x20026800 64#define m_rpmsg_sh_mem_size 0x00001800 65#endif 66 67#define m_data_start 0x20000000 68#define m_data_size 0x00010000 69 70#define m_sramx_start 0x04000000 71#define m_sramx_size 0x00008000 72 73/* Sizes */ 74#if (defined(__stack_size__)) 75 #define Stack_Size __stack_size__ 76#else 77 #define Stack_Size 0x0400 78#endif 79 80#if (defined(__heap_size__)) 81 #define Heap_Size __heap_size__ 82#else 83 #define Heap_Size 0x0400 84#endif 85 86#define RTT_HEAP_LENGTH (m_data_size - ImageLength(RW_m_data) - ImageLength(ARM_LIB_HEAP) - ImageLength(ARM_LIB_STACK)) 87 88LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region 89 VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address 90 * (RESET,+FIRST) 91 } 92 ER_m_text m_text_start m_text_size { ; load address = execution address 93 * (InRoot$$Sections) 94 .ANY (+RO) 95 } 96 ER_m_sramx m_sramx_start m_sramx_size { ; SRAMX memory 97 * (sramx) 98 } 99 100 RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data 101 .ANY (+RW +ZI) 102 } 103 ARM_LIB_HEAP ((ImageLimit(RW_m_data) == m_data_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up 104 } 105 ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down 106 } 107 RTT_HEAP +0 EMPTY RTT_HEAP_LENGTH { 108 } 109 110 111#if (defined(__use_shmem__)) 112 RPMSG_SH_MEM m_rpmsg_sh_mem_start UNINIT m_rpmsg_sh_mem_size { ; Shared memory used by RPMSG 113 * (rpmsg_sh_mem_section) 114 } 115#endif 116} 117 118LR_CORE1_IMAGE m_core1_image_start { 119 CORE1_REGION m_core1_image_start m_core1_image_size { 120 *(M0CODE) 121 } 122} 123 124