1#! armcc -E
2/*
3** ###################################################################
4**     Processors:          LPC54608J512BD208
5**                          LPC54608J512ET180
6**
7**     Compiler:            Keil ARM C/C++ Compiler
8**     Reference manual:    LPC54S60x/LPC5460x User manual Rev.0.9  7 Nov 2016
9**     Version:             rev. 1.1, 2016-11-25
10**     Build:               b161227
11**
12**     Abstract:
13**         Linker file for the Keil ARM C/C++ Compiler
14**
15**     Copyright (c) 2016 Freescale Semiconductor, Inc.
16**     Copyright 2016 - 2017 NXP
17**     Redistribution and use in source and binary forms, with or without modification,
18**     are permitted provided that the following conditions are met:
19**
20**     o Redistributions of source code must retain the above copyright notice, this list
21**       of conditions and the following disclaimer.
22**
23**     o Redistributions in binary form must reproduce the above copyright notice, this
24**       list of conditions and the following disclaimer in the documentation and/or
25**       other materials provided with the distribution.
26**
27**     o Neither the name of the copyright holder nor the names of its
28**       contributors may be used to endorse or promote products derived from this
29**       software without specific prior written permission.
30**
31**     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32**     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33**     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34**     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
35**     ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36**     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37**     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
38**     ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39**     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
40**     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41**
42**     http:                 www.nxp.com
43**     mail:                 support@nxp.com
44**
45** ###################################################################
46*/
47
48#if (defined(__ram_vector_table__))
49  #define __ram_vector_table_size__    0x00000400
50#else
51  #define __ram_vector_table_size__    0x00000000
52#endif
53
54#define m_interrupts_start             0x00000000
55#define m_interrupts_size              0x00000400
56
57#define m_text_start                   0x00000400
58#define m_text_size                    0x0007FC00
59
60#define m_interrupts_ram_start         0x20000000
61#define m_interrupts_ram_size          __ram_vector_table_size__
62
63#define m_data_start                   (m_interrupts_ram_start + m_interrupts_ram_size)
64#define m_data_size                    0x00028000/*(0x00028000 - m_interrupts_ram_size)*/
65
66#define m_usb_sram_start               0x40100000
67#define m_usb_sram_size                0x00002000
68
69/* USB BDT size */
70#define usb_bdt_size                   0x0
71/* Sizes */
72#if (defined(__stack_size__))
73  #define Stack_Size                   __stack_size__
74#else
75  #define Stack_Size                   0x0400
76#endif
77
78#if (defined(__heap_size__))
79  #define Heap_Size                    __heap_size__
80#else
81  #define Heap_Size                    0x0400
82#endif
83
84#define RTT_HEAP_LENGTH		(m_data_size - ImageLength(RW_m_data) - ImageLength(ARM_LIB_HEAP) - ImageLength(ARM_LIB_STACK))
85
86LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region
87  VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
88    * (RESET,+FIRST)
89  }
90  ER_m_text m_text_start FIXED m_text_size { ; load address = execution address
91    * (InRoot$$Sections)
92    .ANY (+RO)
93  }
94
95#if (defined(__ram_vector_table__))
96  VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
97  }
98#else
99  VECTOR_RAM m_interrupts_start EMPTY 0 {
100  }
101#endif
102  RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
103    .ANY (+RW +ZI)
104  }
105  ARM_LIB_HEAP +0 EMPTY Heap_Size {    ; Heap region growing up
106  }
107  ARM_LIB_STACK +0 EMPTY Stack_Size { ; Stack region growing down
108  }
109  RTT_HEAP +0 EMPTY RTT_HEAP_LENGTH {
110  }
111}
112
113LR_m_usb_bdt m_usb_sram_start usb_bdt_size {
114  ER_m_usb_bdt m_usb_sram_start UNINIT usb_bdt_size {
115    * (m_usb_bdt)
116  }
117}
118
119LR_m_usb_ram (m_usb_sram_start + usb_bdt_size) (m_usb_sram_size - usb_bdt_size) {
120  ER_m_usb_ram (m_usb_sram_start + usb_bdt_size) UNINIT (m_usb_sram_size - usb_bdt_size) {
121    * (m_usb_global)
122  }
123}
124
125