1 /*
2  * Copyright (c) 2015, Freescale Semiconductor, Inc.
3  * Copyright 2016-2017 NXP
4  *
5  * Redistribution and use in source and binary forms, with or without modification,
6  * are permitted provided that the following conditions are met:
7  *
8  * o Redistributions of source code must retain the above copyright notice, this list
9  *   of conditions and the following disclaimer.
10  *
11  * o Redistributions in binary form must reproduce the above copyright notice, this
12  *   list of conditions and the following disclaimer in the documentation and/or
13  *   other materials provided with the distribution.
14  *
15  * o Neither the name of the copyright holder nor the names of its
16  *   contributors may be used to endorse or promote products derived from this
17  *   software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
23  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 /*
32  * How to set up clock using clock driver functions:
33  *
34  * 1. Setup clock sources.
35  *
36  * 2. Setup voltage for the fastest of the clock outputs
37  *
38  * 3. Set up wait states of the flash.
39  *
40  * 4. Set up all dividers.
41  *
42  * 5. Set up all selectors to provide selected clocks.
43  */
44 
45 /* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
46 !!ClocksProfile
47 product: Clocks v1.0
48 processor: LPC54608J512
49 package_id: LPC54608J512ET180
50 mcu_data: ksdk2_0
51 processor_version: 0.0.0
52 board: LPCXpresso54608
53  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
54 
55 #include "fsl_power.h"
56 #include "fsl_clock.h"
57 #include "clock_config.h"
58 
59 /*******************************************************************************
60  * Definitions
61  ******************************************************************************/
62 
63 /*******************************************************************************
64  * Variables
65  ******************************************************************************/
66 /* System clock frequency. */
67 extern uint32_t SystemCoreClock;
68 
69 /*******************************************************************************
70  ********************* Configuration BOARD_BootClockFRO12M ***********************
71  ******************************************************************************/
72 /* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
73 !!Configuration
74 name: BOARD_BootClockFRO12M
75 outputs:
76 - {id: System_clock.outFreq, value: 12 MHz}
77 settings:
78 - {id: SYSCON.EMCCLKDIV.scale, value: '1', locked: true}
79  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
80 
81 /*******************************************************************************
82  * Variables for BOARD_BootClockFRO12M configuration
83  ******************************************************************************/
84 /*******************************************************************************
85  * Code for BOARD_BootClockFRO12M configuration
86  ******************************************************************************/
BOARD_BootClockFRO12M(void)87 void BOARD_BootClockFRO12M(void)
88 {
89     /*!< Set up the clock sources */
90     /*!< Set up FRO */
91     POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on  */
92     CLOCK_AttachClk(
93         kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
94                                    being below the voltage for current speed */
95     CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
96     POWER_SetVoltageForFreq(
97         12000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
98     CLOCK_SetFLASHAccessCyclesForFreq(12000000U); /*!< Set FLASH wait states for core */
99 
100     /*!< Set up dividers */
101     CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Reset divider counter and set divider to value 1 */
102 
103     /*!< Set up clock selectors - Attach clocks to the peripheries */
104     CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */
105     /*!< Set SystemCoreClock variable. */
106     SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
107 }
108 
109 /*******************************************************************************
110  ********************** Configuration BOARD_BootClockFROHF48M ***********************
111  ******************************************************************************/
112 /* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
113 !!Configuration
114 name: BOARD_BootClockFROHF48M
115 outputs:
116 - {id: System_clock.outFreq, value: 48 MHz}
117 settings:
118 - {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
119  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
120 
121 /*******************************************************************************
122  * Variables for BOARD_BootClockFROHF48M configuration
123  ******************************************************************************/
124 /*******************************************************************************
125  * Code for BOARD_BootClockFROHF48M configuration
126  ******************************************************************************/
BOARD_BootClockFROHF48M(void)127 void BOARD_BootClockFROHF48M(void)
128 {
129     /*!< Set up the clock sources */
130     /*!< Set up FRO */
131     POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on  */
132     CLOCK_AttachClk(
133         kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
134                                    being below the voltage for current speed */
135     POWER_SetVoltageForFreq(
136         48000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
137     CLOCK_SetFLASHAccessCyclesForFreq(48000000U); /*!< Set FLASH wait states for core */
138 
139     CLOCK_SetupFROClocking(48000000U); /*!< Set up high frequency FRO output to selected frequency */
140 
141     /*!< Set up dividers */
142     CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Reset divider counter and set divider to value 1 */
143 
144     /*!< Set up clock selectors - Attach clocks to the peripheries */
145     CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
146     /*!< Set SystemCoreClock variable. */
147     SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK;
148 }
149 
150 /*******************************************************************************
151  ********************* Configuration BOARD_BootClockFROHF96M **********************
152  ******************************************************************************/
153 /* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
154 !!Configuration
155 name: BOARD_BootClockFROHF96M
156 outputs:
157 - {id: System_clock.outFreq, value: 96 MHz}
158 settings:
159 - {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
160 sources:
161 - {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
162  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
163 
164 /*******************************************************************************
165  * Variables for BOARD_BootClockFROHF96M configuration
166  ******************************************************************************/
167 /*******************************************************************************
168  * Code for BOARD_BootClockFROHF96M configuration
169  ******************************************************************************/
BOARD_BootClockFROHF96M(void)170 void BOARD_BootClockFROHF96M(void)
171 {
172     /*!< Set up the clock sources */
173     /*!< Set up FRO */
174     POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on  */
175     CLOCK_AttachClk(
176         kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
177                                    being below the voltage for current speed */
178     POWER_SetVoltageForFreq(
179         96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
180     CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */
181 
182     CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */
183 
184     /*!< Set up dividers */
185     CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Reset divider counter and set divider to value 1 */
186 
187     /*!< Set up clock selectors - Attach clocks to the peripheries */
188     CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
189     /*!< Set SystemCoreClock variable. */
190     SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
191 }
192 
193 /*******************************************************************************
194  ********************* Configuration BOARD_BootClockPLL180M **********************
195  ******************************************************************************/
196 /* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
197 !!Configuration
198 name: BOARD_BootClockPLL180M
199 outputs:
200 - {id: FRO12M_clock.outFreq, value: 12 MHz}
201 - {id: FROHF_clock.outFreq, value: 48 MHz}
202 - {id: SYSPLL_clock.outFreq, value: 180 MHz}
203 - {id: System_clock.outFreq, value: 180 MHz}
204 settings:
205 - {id: SYSCON.M_MULT.scale, value: '30', locked: true}
206 - {id: SYSCON.N_DIV.scale, value: '1', locked: true}
207 - {id: SYSCON.PDEC.scale, value: '2', locked: true}
208 - {id: SYSCON_PDRUNCFG0_PDEN_SYS_PLL_CFG, value: Power_up}
209 sources:
210 - {id: SYSCON._clk_in.outFreq, value: 12 MHz, enabled: true}
211  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
212 
213 /*******************************************************************************
214  * Variables for BOARD_BootClockPLL180M configuration
215  ******************************************************************************/
216 /*******************************************************************************
217  * Code for BOARD_BootClockPLL180M configuration
218  ******************************************************************************/
BOARD_BootClockPLL180M(void)219 void BOARD_BootClockPLL180M(void)
220 {
221     /*!< Set up the clock sources */
222     /*!< Set up FRO */
223     POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on  */
224     CLOCK_AttachClk(
225         kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
226                                    being below the voltage for current speed */
227     POWER_SetVoltageForFreq(
228         12000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
229     CLOCK_SetFLASHAccessCyclesForFreq(12000000U); /*!< Set FLASH wait states for core */
230 
231     /*!< Set up SYS PLL */
232     const pll_setup_t pllSetup = {
233         .pllctrl = SYSCON_SYSPLLCTRL_SELI(32U) | SYSCON_SYSPLLCTRL_SELP(16U) | SYSCON_SYSPLLCTRL_SELR(0U),
234         .pllmdec = (SYSCON_SYSPLLMDEC_MDEC(8191U)),
235         .pllndec = (SYSCON_SYSPLLNDEC_NDEC(770U)),
236         .pllpdec = (SYSCON_SYSPLLPDEC_PDEC(98U)),
237         .pllRate = 180000000U,
238         .flags = PLL_SETUPFLAG_WAITLOCK | PLL_SETUPFLAG_POWERUP};
239     CLOCK_AttachClk(kEXT_CLK_to_SYS_PLL); /*!< Set sys pll clock source from external crystal */
240     CLOCK_SetPLLFreq(&pllSetup);          /*!< Configure PLL to the desired value */
241     POWER_SetVoltageForFreq(
242         180000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
243     CLOCK_SetFLASHAccessCyclesForFreq(180000000U); /*!< Set FLASH wait states for core */
244     CLOCK_AttachClk(kSYS_PLL_to_MAIN_CLK);         /*!< Switch System clock to SYS PLL 180MHz */
245 
246     /* Set SystemCoreClock variable. */
247     SystemCoreClock = BOARD_BootClockPLL180M_CORE_CLOCK;
248 }
249