1/* 2** ################################################################### 3** Processors: LPC55S06JBD64 4** LPC55S06JHI48 5** 6** Compiler: IAR ANSI C/C++ Compiler for ARM 7** Reference manual: LPC55S0x/LPC550x User manual Rev.0.3 14 August 2020 8** Version: rev. 1.0, 2020-04-09 9** Build: b220622 10** 11** Abstract: 12** Linker file for the IAR ANSI C/C++ Compiler for ARM 13** 14** Copyright 2016 Freescale Semiconductor, Inc. 15** Copyright 2016-2022 NXP 16** All rights reserved. 17** 18** SPDX-License-Identifier: BSD-3-Clause 19** 20** http: www.nxp.com 21** mail: support@nxp.com 22** 23** ################################################################### 24*/ 25 26 27/* USB BDT size */ 28define symbol usb_bdt_size = 0x0; 29/* Stack and Heap Sizes */ 30if (isdefinedsymbol(__stack_size__)) { 31 define symbol __size_cstack__ = __stack_size__; 32} else { 33 define symbol __size_cstack__ = 0x0400; 34} 35 36if (isdefinedsymbol(__heap_size__)) { 37 define symbol __size_heap__ = __heap_size__; 38} else { 39 define symbol __size_heap__ = 0x0400; 40} 41 42define symbol m_interrupts_start = 0x00000000; 43define symbol m_interrupts_end = 0x000001FF; 44 45define symbol m_text_start = 0x00000200; 46define symbol m_text_end = 0x0003CFFF; 47 48define symbol m_data_start = 0x20000000; 49define symbol m_data_end = 0x2000FFFF; 50 51define symbol m_sramx_start = 0x04000000; 52define symbol m_sramx_end = 0x04003FFF; 53 54define symbol m_sram3_start = 0x20010000; 55define symbol m_sram3_end = 0x20013FFF; 56 57define memory mem with size = 4G; 58 59define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end] 60 | mem:[from m_text_start to m_text_end]; 61define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__]; 62define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end]; 63if (isdefinedsymbol(__use_shmem__)) { 64 define region rpmsg_sh_mem_region = mem:[from rpmsg_sh_mem_start to rpmsg_sh_mem_end]; 65} 66 67define block CSTACK with alignment = 8, size = __size_cstack__ { }; 68define block HEAP with alignment = 8, size = __size_heap__ { }; 69define block RW { readwrite }; 70define block ZI { zi }; 71 72 73initialize by copy { readwrite, section .textrw }; 74 75if (isdefinedsymbol(__USE_DLIB_PERTHREAD)) 76{ 77 /* Required in a multi-threaded application */ 78 initialize by copy with packing = none { section __DLIB_PERTHREAD }; 79} 80 81if (isdefinedsymbol(__use_shmem__)) { 82 do not initialize { section rpmsg_sh_mem_section }; 83} 84 85place at address mem: m_interrupts_start { readonly section .intvec }; 86place in TEXT_region { readonly }; 87place in DATA_region { block RW }; 88place in DATA_region { block ZI }; 89place in DATA_region { last block HEAP }; 90place in CSTACK_region { block CSTACK }; 91 92 93 94