1#!armclang --target=arm-arm-none-eabi -march=armv8-m.main -E -x c 2/* 3** ################################################################### 4** Processors: LPC55S06JBD64 5** LPC55S06JHI48 6** 7** Compiler: Keil ARM C/C++ Compiler 8** Reference manual: LPC55S0x/LPC550x User manual Rev.0.3 14 August 2020 9** Version: rev. 1.0, 2020-04-09 10** Build: b220622 11** 12** Abstract: 13** Linker file for the Keil ARM C/C++ Compiler 14** 15** Copyright 2016 Freescale Semiconductor, Inc. 16** Copyright 2016-2022 NXP 17** All rights reserved. 18** 19** SPDX-License-Identifier: BSD-3-Clause 20** 21** http: www.nxp.com 22** mail: support@nxp.com 23** 24** ################################################################### 25*/ 26 27 28/* USB BDT size */ 29#define usb_bdt_size 0x0 30/* Sizes */ 31#if (defined(__stack_size__)) 32 #define Stack_Size __stack_size__ 33#else 34 #define Stack_Size 0x0400 35#endif 36 37#if (defined(__heap_size__)) 38 #define Heap_Size __heap_size__ 39#else 40 #define Heap_Size 0x0400 41#endif 42 43#define m_interrupts_start 0x00000000 44#define m_interrupts_size 0x00000200 45 46#define m_text_start 0x00000200 47#define m_text_size 0x0003CE00 48 49#define m_data_start 0x20000000 50#define m_data_size 0x00010000 51 52#define m_sramx_start 0x04000000 53#define m_sramx_size 0x00004000 54 55#define m_sram3_start 0x20010000 56#define m_sram3_size 0x00004000 57 58LR_m_text m_interrupts_start m_interrupts_size+m_text_size { ; load region size_region 59 60 VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address 61 * (.isr_vector,+FIRST) 62 } 63 64 ER_m_text m_text_start FIXED m_text_size { ; load address = execution address 65 * (InRoot$$Sections) 66 .ANY (+RO) 67 } 68 69 RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data 70 .ANY (+RW +ZI) 71 } 72 ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up 73 } 74 ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down 75 } 76 77} 78